NSB9435T1_06 Datasheet, PDF (4/5 Pages) ON Semiconductor – High Current Bias Resistor Transistor

NSB9435T1
1000
100
10
f = 1 MHz
T_A = 25°C
1
0.1
1
10
V_R, REVERSE VOLTAGE (V)
Figure 7. Output Capacitance
4.0
3.0
T_C
2.0
1.0
T_A
0
25
50
75
100
125
T, TEMPERATURE (°C)
Figure 9. Power Derating
10
0.5 ms
1.0
5.0 ms
100 ms
0.1
0.01
0.001
100
0.1
BONDING WIRE LIMIT
THERMAL LIMIT (Single Pulse)
SECONDARY BREAKDOWN LIMIT
1.0
10
100
V_CE, COLLECTOR−EMITTER VOLTAGE (VOLTS)
Figure 8. Active Region Safe Operating Area
There are two limitations on the power handling ability of
a transistor: average junction temperature and secondary
breakdown. Safe operating area curves indicate I_C − V_CE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 8 is based on T_J(pk) = 150_C; T_C is
variable depending on conditions. Secondary breakdown
pulse limits are valid for duty cycles to 10% provided T_J(pk)
v 150_C. T_J(pk) may be calculated from the data in
Figure 10. At high case temperatures, thermal limitations
will reduce the power that can be handled to values less than
150
the limitations imposed by secondary breakdown.
1.0
D = 0.5
0.2
0.1 _0.1
0.05
0.02
0.01 _0.01
0.001
SINGLE PULSE
0.0001
0.0001
0.001
R_qJA(t) = r(t) q_JA
q_JA = 174°C/W
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t₁
T_J(pk) − T_A = P_(pk) q_JA(t)
P_(pk)
t₁
t₂
DUTY CYCLE, D = t₁/t₂
0.01
0.1
1.0
10
100
1000
t, TIME (seconds)
Figure 10. Thermal Response
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