MC74HC4316A_14 Datasheet, PDF (4/10 Pages) ON Semiconductor – Quad Analog Switch/ Multiplexer/Demultiplexer

MC74HC4316A
DC ELECTRICAL CHARACTERISTICS Analog Section (Voltages Referenced to V_EE)
Guaranteed Limit
Symbol
Parameter
R_on Maximum “ON” Resistance
Test Conditions
V_in = V_IH
V_IS = V_CC to V_EE
I_S ≤ 2.0 mA (Figure 2)
V_CC V_EE
V
V
2.0* 0.0
4 5 0.0
4.5 −4.5
6.0 −6.0
–55 to
25°C
−
160
90
90
≤ 85°C
−
200
110
110
≤ 125°C Unit
−
W
240
130
130
V_in = V_IH
2.0 0.0
−
V_IS = V_CC or V_EE (Endpoints)
4.5 0.0
90
I_S ≤ 2.0 mA (Figure 2)
4.5 −4.5
70
6.0 −6.0
70
−
−
115
140
90
105
90
105
DR_on
Maximum Difference in “ON”
Resistance Between Any Two
Channels in the Same Package
V_in = V_IH
V_IS = 1/2 (V_CC − V_EE)
I_S ≤ 2.0 mA
2.0 0.0
−
−
−
W
4.5 0.0
20
25
30
4.5 –4.5
15
20
25
6.0 –6.0
15
20
25
I_off Maximum Off−Channel
Leakage Current, Any One
Channel
V_in = V_IL
V_IO = V_CC or V_EE
Switch Off (Figure 3)
6.0 –6.0
0.1
0.5
1.0
mA
I_on Maximum On−Channel
Leakage Current, Any One
Channel
V_in = V_IH
V_IS = V_CC or V_EE
(Figure 4)
6.0 –6.0
0.1
0.5
1.0
mA
*At supply voltage (V_CC − V_EE) approaching 2.0 V the analog switch−on resistance becomes extremely non−linear. Therefore, for low−voltage
operation, it is recommended that these devices only be used to control digital signals.
AC ELECTRICAL CHARACTERISTICS (C_L = 50 pF, Control or Enable t_r = t_f = 6 ns, V_EE = GND)
Guaranteed Limit
Symbol
Parameter
t_PLH,
t_PHL
Maximum Propagation Delay, Analog Input to Analog Output
(Figures 8 and 9)
t_PLZ,
t_PHZ
Maximum Propagation Delay, Control or Enable to Analog Output
(Figures 10 and 11)
t_PZL,
t_PZH
Maximum Propagation Delay, Control or Enable to Analog Output
(Figures 10 and 11)
C Maximum Capacitance
ON/OFF Control
and Enable Inputs
V_CC –55 to
V
25°C
2.0
40
4.5
6
6.0
5
2.0
130
4.5
40
6.0
30
2.0
140
4.5
40
6.0
30
−
10
≤ 85°C ≤ 125°C Unit
50
60
ns
8
9
7
8
160
200
ns
50
60
40
50
175
250
ns
50
60
40
50
10
10
pF
Control Input = GND
Analog I/O
−
35
35
35
Feedthrough
−
1.0
1.0
1.0
Typical @ 25°C, V_CC = 5.0 V
C_PD Power Dissipation Capacitance (Per Switch) (Figure 13)*
15
pF
*Used to determine the no−load dynamic power consumption: P_D = C_PD V_CC2f + I_CC V_CC.
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