IRFR1018EPBF Datasheet, PDF (4/15 Pages) International Rectifier – HEXFET TM Power MOSFET

NCP5383
PIN DESCRIPTIONS
Pin No. Symbol
Description
1
R_OSC
A resistance from this pin to ground programs the oscillator frequency according to f_SW = 1 / (R_OSC w 100ĂpF).
Also, this pin supplies a trimmed output voltage of 2.00 V so it may be used to form a voltage divider at the I_LIM
pin to set the over current shutdown threshold as shown in the Applications Schematics.
2
I_LIM
Over current shutdown threshold. To program the shutdown threshold, connect this pin to the R_OSC pin via a
resistor divider as shown in the Applications Schematics. To disable the over current feature connect this pin
directly to the R_OSC pin. To guarantee correct operation, this pin should only be connected to the voltage
generated by the R_OSC pin – do not connect this pin to any externally generated voltages.
3
V_CC
Power for the internal control circuits.
4
AGND
Power supply return for the analog circuits that control output voltage.
5
SS
A capacitor from this pin to ground programs the soft-start time.
6
COMP
Output of the error amplifier and input to the inverting pin of the PWM comparators.
7
V_FB
Voltage feedback pin and error amplifier inverting input. Connect a resistor from this pin to V_CORE. The value of
this resistor and the amount of current from the droop resistor (R_DRP) will set the amount of output voltage
droop (AVP) during load.
8
V_DRP
Current signal output for Adaptive Voltage Positioning (AVP). The offset of this pin above the no-load set-point
is proportional to the output current. Connect a resistor from this pin to V_FB to set the amount of AVP current
into the feedback resistor (R_FB) that will result in output voltage droop. Leave this pin open for no AVP.
9
CSx
Non-inverting input to current sense amplifier #x, x = 1, 2
10
12
18
19, 17
CSxN
EN
V_CCP
BG
Inverting input to current sense amplifier #x, x = 1 (Tie to V_CORE)
When this pin is pulled High the controller is enabled. When it is pulled Low the controller will be disabled.
Either an open-collector output (with a pull-up resistor) or a logic gate (CMOS or totem-pole output) may be
used to drive this pin. A Low to High transition on this pin will induce soft start. If the Enable function is not
required, this pin should be tied directly to V_CCP.
Power for the gate drivers
Bottom gate MOSFET driver pin. Connect this pin to the gate of the bottom N-channel MOSFET.:
Phase #x, xĂ=Ă1, 2
20, 16
PGND
Ground reference for the bottom gate drivers
21, 15
SWN
Switch node pin. This is the reference for the floating top gate driver. Connect this pin to the source of the top
MOSFET. : Phase #x, x = 1, 2
22, 14
TG
Top gate MOSFET driver pin. Connect this pin to the gate of the top N-channel MOSFET. : : Phase #x, x = 1,2
23, 13
BST
Supply rail for the floating top gate driver. To form a boost circuit, use an external diode to bring the desired
input voltage to this pin (cathode connected to BST pin). Connect a capacitor (CBST) between this pin and the
PHASE pin. Typical values for CBST range from 0.1 mF to 1 mF. Ensure that CBST is placed near the IC.:
Phase #x, x = 1, 2.
24
PG
PowerGood output. Open drain type output with internal delays. The output is latched low if V_fb is 125% of V_FB
or 75% of V_FB.
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