CAV24C02_15 Datasheet, PDF (4/15 Pages) ON Semiconductor – 2-Kb, 4-Kb, 8-Kb and 16-Kb I2C CMOS Serial EEPROM

CAV24C02, CAV24C04, CAV24C08, CAV24C16
Table 5. A.C. CHARACTERISTICS (Note 6) (V_CC = 2.5 V to 5.5 V, T_A = −40°C to +125°C, unless otherwise specified.)
Standard
Fast
Symbol
Parameter
Min
Max
Min
Max
F_SCL
Clock Frequency
100
400
t_HD:STA
START Condition Hold Time
4
0.6
t_LOW
Low Period of SCL Clock
4.7
1.3
t_HIGH
High Period of SCL Clock
4
0.6
t_SU:STA
START Condition Setup Time
4.7
0.6
t_HD:DAT
Data In Hold Time
0
0
t_SU:DAT
Data In Setup Time
250
100
t_R
SDA and SCL Rise Time
1000
300
t_F (Note 6)
SDA and SCL Fall Time
300
300
t_SU:STO
STOP Condition Setup Time
4
0.6
t_BUF
Bus Free Time Between STOP and START
4.7
1.3
t_AA
SCL Low to Data Out Valid
3.5
0.9
t_DH
Data Out Hold Time
100
100
T_i (Note 6)
Noise Pulse Filtered at SCL and SDA Inputs
100
100
t_SU:WP
WP Setup Time
0
0
t_HD:WP
WP Hold Time
2.5
2.5
t_WR
Write Cycle Time
5
5
t_PU (Notes 7, 8) Power−up to Ready Mode
0.1
0.1
6. Test conditions according to “AC Test Conditions” table.
7. Tested initially and after a design or process change that affects this parameter.
8. t_PU is the delay between the time V_CC is stable and the device is ready to accept commands.
Table 6. A.C. TEST CONDITIONS
Input Drive Levels
Input Rise and Fall Time
0.2 x V_CC to 0.8 x V_CC
v 50 ns
Input Reference Levels
Output Reference Level
Output Test Load
0.3 x V_CC, 0.7 x V_CC
0.5 x V_CC
Current Source I_OL = 3 mA; C_L = 100 pF
Units
kHz
ms
ms
ms
ms
ms
ns
ns
ns
ms
ms
ms
ns
ns
ms
ms
ms
ms
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