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CAT28LV64 Datasheet, PDF (4/15 Pages) Catalyst Semiconductor – 64K-Bit CMOS PARALLEL E2PROM | |||
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CAT28LV64
Table 4. CAPACITANCE (TA = 25°C, f = 1.0 MHz)
Symbol
Test
Max
Conditions
CI/O (Note 5)
Input/Output Capacitance
10
CIN (Note 5)
Input Capacitance
6
5. This parameter is tested initially and after a design or process change that affects the parameter.
VI/O = 0 V
VIN = 0 V
Units
pF
pF
Table 5. D.C. OPERATING CHARACTERISTICS (VCC = 3.0 V to 3.6 V, unless otherwise specified.)
Limits
Symbol
Parameter
Test Conditions
Min
Typ
Max
ICC
VCC Current (Operating, TTL)
CE = OE = VIL,
8
f = 1/tRC min, All I/Oâs Open
ISBC (Note 6)
VCC Current (Standby, CMOS)
CE = VIHC, All I/Oâs Open
100
ILI
Input Leakage Current
VIN = GND to VCC
â1
1
ILO
Output Leakage Current
VOUT = GND to VCC,
â5
5
CE = VIH
VIH (Note 6)
High Level Input Voltage
2
VCC + 0.3
VIL
Low Level Input Voltage
VOH
High Level Output Voltage
VOL
Low Level Output Voltage
VWI
Write Inhibit Voltage
6. VIHC = VCC â 0.3 V to VCC + 0.3 V.
IOH = â100 mA
IOL = 1.0 mA
â0.3
0.6
2
0.3
2
Table 6. A.C. CHARACTERISTICS, READ CYCLE (VCC = 3.0 V to 3.6 V, unless otherwise specified.)
28LV64â15
28LV64â20
28LV64â25
Symbol
Parameter
Min
Max
Min
Max
Min
Max
tRC
Read Cycle Time
150
200
250
tCE
CE Access Time
150
200
250
tAA
Address Access Time
150
200
250
tOE
OE Access Time
70
80
100
tLZ (Note 7)
CE Low to Active Output
0
0
0
tOLZ (Note 7)
OE Low to Active Output
0
0
0
tHZ (Notes 7, 8) CE High to HighâZ Output
50
50
55
tOHZ (Notes 7, 8) OE High to HighâZ Output
50
50
55
tOH (Note 7)
Output Hold from Address Change
0
0
0
7. This parameter is tested initially and after a design or process change that affects the parameter.
8. Output floating (HighâZ) is defined as the state when the external data line is no longer driven by the output buffer.
Units
mA
mA
mA
mA
V
V
V
V
V
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
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