MT9F002_16 Datasheet, PDF(39/89 Page) ON Semiconductor – 1/2.3-Inch 14 Mp CMOS Digital Image Sensor

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MT9F002_16 Datasheet, PDF (39/89 Pages) ON Semiconductor – 1/2.3-Inch 14 Mp CMOS Digital Image Sensor

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MT9F002: 1/2.3-Inch 14 Mp CMOS Digital Image Sensor

Sensor Readout Configuration

Image Acquisition Modes

The MT9F002 supports two image acquisition modes:

1. Electronic rolling shutter (ERS) mode

This is the normal mode of operation. When the MT9F002 is streaming; it generates

frames at a fixed rate, and each frame is integrated (exposed) using the ERS. When the

ERS is in use, timing and control logic within the sensor sequences through the rows

of the array, resetting and then reading each row in turn. In the time interval between

resetting a row and subsequently reading that row, the pixels in the row integrate inci-

dent light. The integration (exposure) time is controlled by varying the time between

row reset and row readout. For each row in a frame, the time between row reset and

row readout is fixed, leading to a uniform integration time across the frame. When the

integration time is changed (by using the two-wire serial interface to change register

settings), the timing and control logic controls the transition from old to new integra-

tion time in such a way that the stream of output frames from the MT9F002 switches

cleanly from the old integration time to the new while only generating frames with

uniform integration. See âChanges to Integration Timeâ in the MT9F002 Register Ref-

erence.

2. Global reset mode

This mode can be used to acquire a single image at the current resolution. In this

mode, the end point of the pixel integration time is controlled by an external electro-

mechanical shutter, and the MT9F002 provides control signals to interface to that

shutter. The operation of this mode is described in detail in "Global Reset" on page 55.

The benefit of using an external electromechanical shutter is that it eliminates the visual

artifacts associated with ERS operation. Visual artifacts arise in ERS operation, particu-

larly at low frame rates, because an ERS image effectively integrates each row of the pixel

array at a different point in time.

Window Control

The sequencing of the pixel array is controlled by the x_addr_start, y_addr_start, x_ad-

dr_end, and y_addr_end registers. For both parallel and serial HiSPi interfaces, the

output image size is controlled by the x_output_size and y_output_size registers.

Pixel Border

The default settings of the sensor provide a 4608H x3288V image. A border of up to

8 pixels (4 in binning) on each edge can be enabled by reprogramming the x_addr_start,

y_addr_start, x_addr_end, y_addr_end, x_output_size, and y_output_size registers

accordingly. This provides a total active pixel array of 4640H x 3320V including border

pixels.

MT9F002/D Rev. 9, 1/16 EN

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