CM2030 Datasheet, PDF (3/17 Pages) California Micro Devices Corp – HDMI Transmitter Port Protection and Interface Device

CM2030
PIN DESCRIPTIONS
PINS
4, 35
6, 33
7, 32
9, 30
10, 29
12, 27
13, 26
15, 24
16
23
17
22
18
21
19
20
2
37
1
NAME
TMDS_D2+
TMDS_D2–
TMDS_D1+
TMDS_D1–
TMDS_D0+
TMDS_D0–
TMDS_CK+
TMDS_CK–
CE_REMOTE_IN
CE_REMOTE_OUT
DDC_CLK_IN
DDC_CLK_OUT
DDC_DAT_IN
DDC_DAT_OUT
HOTPLUG_DET_IN
HOTPLUG_DET_OUT
ESD Level
8kV³
8kV³
8kV³
8kV³
8kV³
8kV³
8kV³
8kV³
2kV⁴
8kV³
2kV⁴
8kV³
2kV⁴
8kV³
2kV⁴
8kV³
LV_SUPPLY
CE_SUPPLY
5V_SUPPLY
2kV⁴
2kV^4,2
2kV⁴
DESCRIPTION
TMDS 0.9pF ESD protection.¹
TMDS 0.9pF ESD protection.¹
TMDS 0.9pF ESD protection.¹
TMDS 0.9pF ESD protection.¹
TMDS 0.9pF ESD protection.¹
TMDS 0.9pF ESD protection.¹
TMDS 0.9pF ESD protection.¹
TMDS 0.9pF ESD protection.¹
CE_SUPPLY referenced logic level in.
5V_SUPPLY referenced logic level out plus 10pF ESD.⁶
LV_SUPPLY referenced logic level in.
5V_SUPPLY referenced logic level out plus 10pF ESD.⁶
LV_SUPPLY referenced logic level in.
5V_SUPPLY referenced logic level out plus 10pF ESD.⁶
LV_SUPPLY referenced logic level in.
5V_SUPPLY referenced logic level out plus 10pF ESD. A 0.1µF
bypass ceramic capacitor is recommended on this pin.²
Bias for CE / DDC / HOTPLUG level shifters.
CEC bias voltage. Previously CM2020 ESD_BYP pin.
Current source for 5V_OUT, VREF for DDC I²C voltage references,
and bias for 8kV ESD pins.
38
5V_OUT
8kV³
55mA minimum overcurrent protected 5V output. This output must be
bypassed with a 0.1µF ceramic capacitor.
3, 5, 8, 11,
14, 25,
GND / TMDS_GND N/A
GND reference.
28, 31, 34, 36
Note 1: These 2 pins need to be connected together in-line on the PCB. See recommended layout diagram.
Note 2: This output can be connected to an external 0.1µF ceramic capacitor/pads to maintain backward compatibility with the
CM2020.
Note 3: Standard IEC 61000-4-2, C_DISCHARGE=150pF, Ω R_DISCHARGE=330 , 5V_SUPPLY and LV_SUPPLY within recommended
operating conditions, GND=0V, 5V_OUT (pin 38), and HOTPLUG_DET_OUT (pin 20) each bypassed with a 0.1µF
ceramic capacitor connected to GND.
Note 4: Human Body Model per MIL-STD-883, Method 3015, C_DISCHARGE=100pF, Ω R_DISCHARGE=1.5k , 5V_SUPPLYand LV_SUPPLY
within recommended operating conditions, GND=0V, 5V_OUT (pin 38), and HOTPLUG_DET_OUT (pin 20) each
bypassed with a 0.1µF ceramic capacitor connected to GND.
Note 5: These pins should be routed directly to the associated GND pins on the HDMI connector with single point ground vias at
the connector.
Note 6: The slew-rate control and active acceleration circuitry dynamically offsets the system capacitive load on these pins.
Rev. 5 | Page 3 of 17 | www.onsemi.com