CAT5273 Datasheet, PDF (3/14 Pages) ON Semiconductor – Dual 256‐position I2C Compatible Digital Potentiometers (POTs)

CAT5271, CAT5273
Table 3. ELECTRICAL CHARACTERISTICS: 50 kW and 100 kW Versions
V_DD = 2.7 V to 5.5 V; V_A = V_DD; V_B = 0 V; –40C < T_A < +85C; unless otherwise noted. (Note 2)
Parameter
Test Conditions
Typ
Symbol
Min
(Note 3) Max Unit
DC CHARACTERISTICS − RHEOSTAT MODE
Resistor Differential Nonlinearity (Note 4) R_WB, V_A = no connection (CAT5271) R−DNL
−1
Resistor Integral Nonlinearity (Note 4)
R_WB, V_A = no connection (CAT5271) R−INL
−2
Nominal Resistor Tolerance (Note 5)
T_A = 25C
nR_AB
−20
Resistance Temperature Coefficient
V_AB = V_DD, Wiper = no connection nR_AB/nT
Wiper Resistance
V_DD = 5 V, I_W = 3 mA
R_W
V_DD = 3 V, I_W = 3 mA
DC CHARACTERISTICS − POTENTIOMETER DIVIDER MODE
0.1
+1
LSB
0.4
+2
LSB
+20
%
100
ppm/C
50
120
W
100
250
Resolution
Differential Nonlinearity (Note 6)
Integral Nonlinearity (Note 6)
Voltage Divider Temperature Coefficient
Full-scale Error
Zero-scale Error
RESISTOR TERMINALS
Code = 0x80
Code = 0xFF
Code = 0x00
N
DNL
−1
INL
−1
nV_W/nT
V_WFSE
−3
V_WZSE
0
8
Bits
0.1
+1
LSB
0.4
+1
LSB
100
ppm/C
−1
0
LSB
1
3
LSB
Voltage Range (Note 7)
Capacitance (Note 8) A, B
f = 1 MHz, measured to GND,
Code = 0 x 80
V_A,B,W
C_A,B
GND
V_DD
V
45
pF
Capacitance (Note 8) W
f = 1 MHz, measured to GND,
C_W
Code = 0 x 80
60
pF
Common-mode Leakage (Note 8)
DIGITAL INPUTS
V_A = V_B = V_DD/2
I_CM
1
nA
Input Logic High
Input Logic Low
Input Logic High
Input Logic Low
Input Current
POWER SUPPLIES
V_DD = 5 V
V_DD = 5 V
V_DD = 3 V
V_DD = 3 V
V_IN = 0 V or 5 V
V_IH
0.7 x V_DD
V_IL
V_IH
0.7 x V_DD
V_IL
I_IL
V
0.3V_DD
V
V
0.3V_DD
V
1
mA
Power Supply Range
V_{DD RANGE}
2.7
Supply Current
V_IH = 5 V or V_IL = 0 V
I_DD
Power Dissipation (Note 8)
Power Supply Sensitivity
V_IH = 5 V or V_IL = 0 V, V_DD = 5 V
nV_DD = +5 V 10%, Code = Midscale
P_DISS
PSS
DYNAMIC CHARACTERISTICS (Notes 8 and 10)
5.5
V
0.3
2
mA
0.2
mW
0.05 %/%
Bandwidth –3 dB
R_AB = 50 kW / 100 kW, Code = 0x80
BW
100/40
kHz
Total Harmonic Distortion
V_A =1 V rms, V_B = 0 V,
f = 1 kHz, R_AB = 10 kW
THD_W
0.05
%
V_W Settling Time (50 kW/100 kW)
V_A = 5 V, V_B = 0 V, 1 LSB error band
t_S
2
ms
2. V_A applies to both A1 and A2, V_B applies to both B1 and B2.
3. Typical specifications represent average readings at +25C and V_DD = 5 V.
4. Resistor position nonlinearity error R−INL is the deviation from an ideal value measured between the maximum resistance and the
minimum resistance wiper positions. R−DNL measures the relative step change from ideal between successive tap positions. Parts are
guaranteed monotonic.
5. CAT5271: V_AB = V_DD, Wiper (V_W) = no connect. CAT5273: V_WB = V_DD.
6. INL and DNL are measured at VW with the digital potentiometer configured as a potentiometer divider similar to a voltage output D/A
converter. V_A = V_DD and V_B = 0 V. DNL specification limits of 1 LSB maximum are guaranteed monotonic operating conditions.
7. Resistor terminals A, B, W have no limitations on polarity with respect to each other.
8. Guaranteed by design and not subject to production test.
9. Maximum terminal current is bounded by the maximum current handling of the switches, maximum power dissipation of the package, and
maximum applied voltage across any two of the A, B, and W terminals at a given resistance.
10. All dynamic characteristics use V_DD = 5 V.
http://onsemi.com
3