CAT28C256N-20 Datasheet, PDF (3/14 Pages) ON Semiconductor – 256 kb Parallel EEPROM

CAT28C256
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameters
Ratings
Units
Temperature Under Bias
–55 to +125
°C
Storage Temperature
–65 to +150
°C
Voltage on Any Pin with Respect to Ground (Note 1)
V_CC with Respect to Ground
Package Power Dissipation Capability (T_A = 25°C)
Lead Soldering Temperature (10 secs)
–2.0 V to +V_CC + 2.0 V
V
−2.0 to +7.0
V
1.0
W
300
°C
Output Short Circuit Current (Note 2)
100
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The minimum DC input voltage is −0.5 V. During transitions, inputs may undershoot to −2.0 V for periods of less than 20 ns. Maximum DC
voltage on output pins is V_CC + 0.5 V, which may overshoot to V_CC + 2.0 V for periods of less than 20 ns.
2. Output shorted for no more than one second. No more than one output shorted at a time.
Table 2. RELIABILITY CHARACTERISTICS (Note 3)
Symbol
Parameter
Test Method
Min
Max
N_END
Endurance
MIL−STD−883, Test Method 1033
100,000
T_DR
Data Retention
MIL−STD−883, Test Method 1008
100
V_ZAP
ESD Susceptibility MIL−STD−883, Test Method 3015
2,000
I_LTH (Note 4)
Latch−Up
JEDEC Standard 17
100
3. These parameters are tested initially and after a design or process change that affects the parameters.
4. Latch−up protection is provided for stresses up to 100 mA on address and data pins from −1 V to V_CC + 1 V.
Units
Cycles/Byte
Years
V
mA
Table 3. D.C. OPERATING CHARACTERISTICS (V_CC = 5 V ±10%, unless otherwise specified.)
Limits
Symbol
Parameter
Test Conditions
Min
Typ
Max
I_CC
V_CC Current (Operating, TTL)
CE = OE = V_IL,
30
f = 8 MHz, All I/O’s Open
Units
mA
I_CCC (Note 5)
V_CC Current (Operating, CMOS)
CE = OE = V_ILC,
f = 8 MHz, All I/O’s Open
25
mA
I_SB
I_SBC (Note 6)
I_LI
I_LO
V_CC Current (Standby, TTL)
V_CC Current (Standby, CMOS)
Input Leakage Current
Output Leakage Current
V_IH (Note 6)
High Level Input Voltage
V_IL (Note 5)
Low Level Input Voltage
V_OH
High Level Output Voltage
V_OL
Low Level Output Voltage
V_WI
Write Inhibit Voltage
5. V_ILC = −0.3 V to +0.3 V.
6. V_IHC = V_CC −0.3 V to V_CC + 0.3 V.
CE = V_IH, All I/O’s Open
CE = V_IHC, All I/O’s Open
V_IN = GND to V_CC
V_OUT = GND to V_CC,
CE = V_IH
I_OH = −400 mA
I_OL = 2.1 mA
−10
−10
2
−0.3
2.4
3.5
1
mA
150
mA
10
mA
10
mA
V_CC + 0.3
V
0.8
V
V
0.4
V
V
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