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MC74VHC1GT04_16 Datasheet, PDF (2/6 Pages) ON Semiconductor – Inverting Buffer / CMOS Logic Level Shifter
MC74VHC1GT04
MAXIMUM RATINGS
Symbol
Characteristics
Value
Unit
VCC
VIN
VOUT
DC Supply Voltage
DC Input Voltage
DC Output Voltage
−0.5 to +7.0
V
−0.5 to +7.0
V
VCC = 0
−0.5 to 7.0
V
High or Low State
−0.5 to VCC + 0.5
IIK
IOK
IOUT
ICC
PD
qJA
TL
TJ
Tstg
VESD
Input Diode Current
Output Diode Current
DC Output Current, per Pin
DC Supply Current, VCC and GND
Power dissipation in still air
Thermal resistance
Lead temperature, 1 mm from case for 10 s
Junction temperature under bias
Storage temperature
ESD Withstand Voltage
VOUT < GND; VOUT > VCC
SC−88A, TSOP−5
SC−88A, TSOP−5
Human Body Model (Note 1)
Machine Model (Note 2)
Charged Device Model (Note 3)
−20
+20
+25
+50
200
333
260
+150
−65 to +150
2000
200
N/A
mA
mA
mA
mA
mW
_C/W
°C
°C
°C
V
ILatchup Latchup Performance
Above VCC and Below GND at 125°C (Note 4)
±100
mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Tested to EIA/JESD22−A114−A
2. Tested to EIA/JESD22−A115−A
3. Tested to JESD22−C101−A
4. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol
Characteristics
Min
Max
Unit
VCC
VIN
VOUT
DC Supply Voltage
DC Input Voltage
DC Output Voltage
3.0
0.0
VCC = 0
0.0
High or Low State
0.0
5.5
V
5.5
V
5.5
V
VCC
TA
Operating Temperature Range
−55
+125
°C
tr , tf Input Rise and Fall Time
VCC = 3.3 V ± 0.3 V
0
VCC = 5.0 V ± 0.5 V
0
100
ns/V
20
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
Junction
Temperature °C
Time, Hours
Time, Years
80
1,032,200
117.8
90
419,300
47.9
100
178,700
20.4
110
79,600
9.4
120
37,000
4.2
130
17,800
2.0
140
8,900
1.0
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
1
1
10
100
1000
TIME, YEARS
Figure 3. Failure Rate vs. Time Junction Temperature
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2