CM1230_12 Datasheet, PDF (2/8 Pages) ON Semiconductor – Low-Capacitance ESD Protection Array

V_P
CH1
CH2
V_N
CM1230−02CP/
CM1230−J2CP
CM1230
ELECTRICAL SCHEMATIC
CH4 V_P CH3
CH8
CH7 V_P
CH6 CH5
CH1 V_N CH2
CM1230−04CP
CH1 CH2
V_N CH3
CM1230−08CP
CH4
Table 1. PIN DESCRIPTIONS
2−Channel, 4−Bump CSP
Pin Name
Type
Description
A1
V_N
B1 CH2
GND
I/O
Negative Voltage Supply Rail
ESD Channel
A2 CH1
I/O
ESD Channel
B2
V_P
PWR Positive Voltage Supply Rail
Pin Name
A1 CH1
B1 CH2
A2
V_P
B2
V_N
A3 CH3
B3 CH4
4−Channel, 6−Bump CSP
Type
Description
I/O
ESD Channel
I/O
ESD Channel
PWR Positive Voltage Supply Rail
GND Negative Voltage Supply Rail
I/O
ESD Channel
I/O
ESD Channel
Pin Name
A1 CH1
B1 CH2
A2 CH3
B2 CH4
A3
V_P
B3
V_N
A4 CH5
B4 CH6
A5 CH7
B5 CH8
8−Channel, 10−Bump CSP
Type
Description
I/O
ESD Channel
I/O
ESD Channel
I/O
ESD Channel
I/O
ESD Channel
PWR Positive Voltage Supply Rail
GND Negative Voltage Supply Rail
I/O
ESD Channel
I/O
ESD Channel
I/O
ESD Channel
I/O
ESD Channel
PACKAGE / PINOUT DIAGRAMS
Top View
(Bumps Down View)
Bottom View
(Bumps Up View)
Orientation
Marking
12
A⁺
L
B
Orientation
Marking
A2 A1
B2 B1
CM1230−02/J2
4−bump CSP Package
Orientation
Marking
123
A⁺
L30
B
Orientation
Marking
A3 A2 A1
B3 B2 B1
CM1230−04
6−bump CSP Package
Orientation
Marking
12345
A⁺
L308
B
Orientation
Marking
A5 A4 A3 A2 A1
B5 B4 B3 B2 B1
CM1230−08
10−bump CSP Package
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