74HC74 Datasheet, PDF (2/8 Pages) NXP Semiconductors – Dual D-type flip-flop with set and reset; positive-edge trigger

74HC74
PIN ASSIGNMENT
LOGIC DIAGRAM
RESET 1 1
DATA 1 2
CLOCK 1 3
SET 1 4
Q1 5
Q1 6
GND 7
14 V_CC
13 RESET 2
12 DATA 2
11 CLOCK 2
10 SET 2
9 Q2
8 Q2
FUNCTION TABLE
Inputs
Set Reset Clock Data
LH
HL
LL
HH
HH
HH
HH
HH
XX
XX
XX
H
L
LX
HX
X
Outputs
QQ
HL
LH
H* H*
HL
LH
No Change
No Change
No Change
RESET 1 ¹
DATA 1 ²
3
CLOCK 1
SET 1 ⁴
13
RESET 2
DATA 2 ¹²
11
CLOCK 2
10
SET 2
5
Q1
6
Q1
9
Q2
8
Q2
PIN 14 = V_CC
PIN 7 = GND
*Both outputs will remain high as long as Set and Reset are low, but the output
states are unpredictable if Set and Reset go high simultaneously.
Î^MÎ^AXÎ^IMUÎ^{M R}Î^ATÎ^INGÎ^S ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Symbol
Parameter
Value
Unit
V_CC DC Supply Voltage (Referenced to GND)
– 0.5 to + 7.0
V
V_in DC Input Voltage (Referenced to GND)
– 0.5 to V_CC + 0.5 V
V_out DC Output Voltage (Referenced to GND)
– 0.5 to V_CC + 0.5 V
I_in
DC Input Current, per Pin
±20
mA
I_out DC Output Current, per Pin
±25
mA
I_CC DC Supply Current, V_CC and GND Pins
±50
mA
P_D Power Dissipation in Still Air,
SOIC Package†
500
mW
TSSOP Package†
450
T_stg Storage Temperature
– 65 to + 150
_C
T_L Lead Temperature, 1 mm from Case for 10 Seconds
_C
(SOIC or TSSOP Package)
260
300
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, V_in and
V_out should be constrained to the
range GND v (V_in or V_out) v V_CC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V_CC).
Unused outputs must be left open.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect device
reliability.
†Derating — SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: − 6.1 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
V_CC DC Supply Voltage (Referenced to GND)
2.0
V_in, V_out DC Input Voltage, Output Voltage (Referenced to GND)
0
T_A Operating Temperature, All Package Types
– 55
t_r, t_f Input Rise and Fall Time
(Figures 1, 2, 3)
V_CC = 2.0 V
0
V_CC = 3.0 V
0
V_CC = 4.5 V
0
V_CC = 6.0 V
0
Max Unit
6.0
V
V_CC
V
+ 125 _C
1000 ns
600
500
400
http://onsemi.com
2