74HC138 Datasheet, PDF (2/9 Pages) NXP Semiconductors – 3-to-8 line decoder/demultiplexer; inverting

74HC138
A0 1
A1 2
A2 3
CS2 4
CS3 5
CS1 6
Y7 7
GND 8
16 V_CC
15 Y0
14 Y1
13 Y2
12 Y3
11 Y4
10 Y5
9 Y6
Figure 1. Pin Assignment
A0
ADDRESS
INPUTS
A1
A2
CS1
CHIP−
SELECT CS2
INPUTS
CS3
1
15 _Y0
2
14 _Y1
3
13 _Y2
12 _Y3
11 _Y4
10 _Y5
9 _Y6
7 _Y7
6
4
PIN 16 = V_CC
PIN 8 = GND
5
Figure 2. Logic Diagram
ACTIVE−LOW
OUTPUTS
FUNCTION TABLE
Inputs
Outputs
CS1CS2 CS3 A2 A1 A0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
X X H XXX HH HH HH HH
X H X XXX HH HH HH HH
L X X XXX HH HH HH HH
H L L LLL LHHHHHHH
H L L LLHH L HHHHHH
H L L LHL HH L HHHHH
H L L LHH H H H L H H H H
H L L HLL HHHH L HHH
H L L HLHHHHHH L HH
H L L HHL H H H H H H L H
H L L HHH H H H H H H H L
H = high level (steady state); L = low level (steady state); X = don’t care
ORDERING INFORMATION
Device
Package
Shipping^†
74HC138DR2G
SOIC−16
(Pb−Free)
2500 / Tape & Reel
74HC138DTR2G
TSSOP−16*
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
http://onsemi.com
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