CAT9532 Datasheet, PDF (11/18 Pages) ON Semiconductor – 16-bit Programmable LED Dimmer with I2C Interface

CAT9532
External Reset Operation
The CAT9532 registers and the I²C state machine are
initialized to their default state when the RESET input
is held low for a minimum of t_W. The external Reset
timing is shown in Figure 9.
Power-On Reset Operation
The CAT9532 incorporates Power-On Reset (POR)
circuitry which protects the internal logic against
powering up in the wrong state. The device is in a
reset state for V_CC less than the internal POR
threshold level (V_POR). When V_CC exceeds the V_POR
level, the reset state is released and the CAT9532
internal state machine and registers are initialized to
their default state.
Figure 8. Read Input Port Register Timing Diagram
Slave Address
Data From Port
SDA
READ FROM
PORT
S 1 1 0 0 A2 A1 A0
A
Start Condition
R/W Acknowledge
From Slave
DATA 1
DATA INTO
PORT
DATA 1
DATA 2
DATA 3
t_ph
Data From Port
A
Acknowledge
From Master
DATA 4
NA P
No Acknowledge Stop 
From Master Condition
DATA 4
t_ps
Figure 9. ¯R¯E¯S¯E¯T¯ Timing Diagram
START
SCL
SDA
30%
RESET _50%
t_REC
LEDx
ACK OR READ CYCLE
t_RESET
50%
50%
t_W
t_RESET
50% _{LED OFF}
© 2010 SCILLC. All rights reserved
11
Characteristics subject to change without notice
Doc. No. MD-9001 Rev. E