CAT6243_16 Datasheet, PDF (11/15 Pages) ON Semiconductor – 1 Amp Adjustable CMOS LDO Voltage Regulator

CAT6243
APPLICATIONS INFORMATION
Input Decoupling (C_IN)
A ceramic or tantalum 1 mF capacitor is recommended and
should be connected close to the CAT6243’s package.
Higher capacitance and lower ESR will improve the overall
line and load transient response.
Output Decoupling (C_OUT)
The minimum output decoupling value is 2.2 mF and can
be augmented to fulfill stringent load transient
requirements. The regulator works with ceramic chip
capacitors. Larger values, up to 22 mF, improve noise
rejection and load regulation transient response. The
CAT6243 is a highly stable regulator and performs well over
a wide range capacitor Equivalent Series Resistances (ESR).
No−Load Regulation Considerations
The CAT6243 adjustable regulator will operate properly
under conditions where the only load current is through the
resistor divider that sets the output voltage. However, in the
case where the CAT6243 is configured to provide a 0.8 V
output, there is no resistor divider and the ADJ pin is
connected to V_OUT. If the part is enabled under no−load
conditions, leakage current through the pass transistor at
junction temperatures above 85°C can approach several
microamperes, especially as junction temperature
approaches 150°C. If this leakage current is not directed into
a load, the output voltage will rise above nominal until a load
is applied. For this reason it is recommended that a minimum
load of 100 mA be present at all times. Normally the voltage
setting resistor divider will serve this function but if no
divider is used (V_OUT = 0.8 V) then an external load of 8 KW
should be provided.
Output Voltage Adjust
The output voltage can be adjusted from 0.8 V to 5.0 V
using resistors between the output and the ADJ input. The
output voltage and resistors are chosen using Equation 1 and
Equation 2.
ǒ Ǔ V_OUT + 0.8
1
)
R₁
R₂
) ^ǒI_ADJ
R₁^Ǔ
(eq. 1)
R₂
^
0.8 V
I_DIV
ǒ Ǔ R₁ ^ R₂
V_OUT
0.8 V
*
1
(eq. 2)
(eq. 3)
VIN
VIN VOUT
C_IN
ENABLE
CAT6243
BYP
ADJ
C_BYP
GND
VOUT
R₁
C_OUT
R₂
Figure 27. Adjustable Output Resistor Divider
Input bias current, I_ADJ, for all practical designs can be
ignored (I_ADJ = 0). Considering that the lowest
recommended I_OUT value is 100 mA, then, when there is no
load on V_OUT, I_DIV must be 100 mA to keep CAT6243 in
regulation. This then sets R2’s value using Equation 2 to
8 KW, which minimizes output noise. Use Equation 3 to find
the required value for R1. If needed, lower values for I_DIV
can be considered, but not lower than 10 mA. The price will
be worse values for both load regulation and TC_OUT.
Thermal Considerations
As power in the CAT6243 increases, it may become
necessary to provide thermal relief. The maximum power
dissipation supported by this device is dependent upon
board design and layout. Mounting pad configuration on the
PCB, the board material, and the ambient temperature affect
the rate of junction temperature rise for the part. When the
CAT6243 has good thermal conductivity through the PCB,
the junction temperature will be relatively low even with
high power applications. The maximum dissipation the
CAT6243 can handle is given by:
ƪ ƫ _{TJ(MAX) * TA}
P_D(MAX) +
R_qJA
(eq. 4)
Since T_J is not recommended to exceed 125°C, then with
CAT6243 soldered to 645 mm² (1 sq inch), 1 oz copper area,
FR4 PCB material can dissipate in excess of 1 W when the
ambient temperature (T_A) is 25°C. Note that this assumes the
pad in the center of the package is soldered to the dissipating
copper foil. See Figure below for R_qJA versus PCB area for
heat dissipating areas smaller than 645 mm². Power
dissipation can be calculated from the following equations:
P_D [ V_IN(I_GND ) I_OUT) ) I_OUT(V_IN * V_OUT) (eq. 5)
or
V_IN(MAX)
[
P_D(MAX) ) (V_OUT
I_OUT ) I_GND
I_OUT)
(eq. 6)
www.onsemi.com
11