CAT6243_16 Datasheet, PDF (10/15 Pages) ON Semiconductor – 1 Amp Adjustable CMOS LDO Voltage Regulator

CAT6243
PIN FUNCTIONS
V_IN
Positive Power Input. Power is supplied to the device
through the V_IN pin. A bypass capacitor is required on this
pin if the device is more than six inches away from the main
input filter capacitor. In general it is advisable to include a
small bypass capacitor adjacent to the regulator. In
battery−powered circuits this is particularly important
because the output impedance of a battery rises with
frequency, so a bypass capacitor in the range of 1 mF to 10 mF
is recommended.
GND
Ground. The negative voltage of the input power source.
The center pad on the back of the package is also electrically
ground. This pad is used for cooling the device by making
connection to the buried ground plane through solder filled
vias or by contact with a topside copper surface exposed to
free flowing air.
ENABLE
ENABLE is an active high logic input which controls the
regulator’s the output state. If ENABLE < 0.4 V the
regulator is shutdown and V_OUT = 0 V. If ENABLE > 1.6 V
the regulator is active and supplying power to the load.
If the regulator is intended to operate continuously and
won’t be shut down from time to time ENABLE should be
tied to V_IN.
BYP
The Bypass Capacitor input is used to decrease output
voltage noise by placing a capacitor between BYP and
ground. The recommended range of capacitance is from
100 pF to 470 pF. Values larger than this will provide no
additional improvement and will further extend CAT6243’s
startup time.
A bypass capacitor is not required for operation and BYP
may be left open or floating if no capacitor is used but DO
NOT ground BYP as this will interfere with the error
amplifier’s functioning.
ADJ
ADJ = Adjust and is the voltage control input. ADJ
connects to the center point of a resistor divider which
determines the CAT6243’s output voltage. See Applications
Section for resistor selection guidelines.
V_OUT
V_OUT is the regulator’s output and supplies power to the
load. V_OUT can be shut off via the ENABLE input. All
CAT6243 members are designed to block reverse current,
meaning anytime V_OUT becomes greater than V_IN the pass
FET will be shut off so there is no reverse current flow from
output to input. CAT6243 is also equipped with an output
discharge transistor that is turned ON anytime ENABLE is
at a logic Low. This transistor ensures V_OUT discharges to
0 V when the regulator is shutdown. This is especially
important when powering digital circuitry because if V_OUT
fails to reach 0 V their POR (power−ON reset) circuitry may
not trigger and scrambled data or unpredictable operations
may result.
A minimum output capacitor of 2.2 mF should be placed
between V_OUT and GND to insure stable operation.
Increasing the size of C_OUT, up to 22 mF, will improve
transient response to large changes in load current.
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