CAT34TS02_13 Datasheet, PDF (11/20 Pages) ON Semiconductor – Digital Output Temperature Sensor with On-board SPD EEPROM

CAT34TS02
BUS ACTIVITY: S
S
N
T
SPD
T
OS
A
MASTER R
SLAVE
ADDRESS
BYTE
ADDRESS (n)
A
R
SLAVE
ADDRESS
AT
CO
T
T
KP
SDA LINE S
S
P
SLAVE
A
A
C
C
K
K
A
C
DATA n
K
BUS ACTIVITY: S
T
A
MASTER R
T
SDA LINE S
SLAVE
S
TS
SLAVE
ADDRESS
REGISTER
ADDRESS
T
A
R
SLAVE
ADDRESS
T
A
C
K
S
A
A
C
C
K
K
A
C ^{DATA (MSB)}
K
Figure 29. Selective Read
N
OS
AT
CO
KP
P
DATA (LSB)
BUS ACTIVITY:
SPD
SLAVE
MASTER ADDRESS
SDA LINE
A
SLAVE
C
K
A
A
A
C
C
C
K
K
K
DATA n
DATA n+1
DATA n+2
Figure 30. EEPROM Sequential Read
N
OS
AT
CO
KP
P
DATA n+x
Software Write Protection
The lower half of memory (first 128 bytes) can be
protected against Write requests by setting one of two
Software Write Protection (SWP) flags.
The Permanent Software Write Protection (PSWP) flag
can be set or read while all address pins are at regular CMOS
levels (GND or V_CC), whereas the very high voltage V_HV
must be present on address pin A0 to set, clear or read the
Reversible Software Write Protection (RSWP) flag. The
D.C. OPERATING CONDITIONS for RSWP operations
are shown in Table 7.
The SWP commands are listed in Table 8. All commands
are preceded by a START and terminated with a STOP,
following the ACK or NoACK from the CAT34TS02. All
SWP related Slave addresses use the pre−amble: 0110 (6h),
instead of the regular 1010 (Ah) used for memory access.
For PSWP commands, the three address pins can be at any
logic level, whereas for RSWP commands the address pins
must be at pre−assigned logic levels.
V_HV is interpreted as logic ‘1’. The V_HV condition must
be established on pin A0 before the START and
maintained just beyond the STOP. Otherwise an RSWP
request could be interpreted by the CAT34TS02 as a
PSWP request.
The SWP Slave addresses follow the standard I²C
convention, i.e. to read the state of the SWP flag, the LSB of
the Slave address must be ‘1’, and to set or clear a flag, it
must be ‘0’. For Write commands a dummy byte address and
dummy data byte must be provided (Figure 31). In contrast
to a regular memory Read, a SWP Read does not return Data.
Instead the CAT34TS02 will respond with NoACK if the
flag is set and with ACK if the flag is not set. Therefore, the
Master can immediately follow up with a STOP, as there is
no meaningful data following the ACK interval (Figure 32).
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