 English |
|
|
|
|
|
|
|
| PZT651T1G Datasheet, PDF (1/4 Pages) ON Semiconductor – NPN Silicon Planar Epitaxial Transistor | |||
| |||
|
PZT651T1G
NPN Silicon Planar
Epitaxial Transistor
This NPN Silicon Epitaxial transistor is designed for use in
industrial and consumer applications. The device is housed in the
SOT--223 package which is designed for medium power surface
mount applications.
SOT--223 package ensures level mounting, resulting in improved
thermal conduction, and allows visual inspection of soldered joints.
The formed leads absorb thermal stress during soldering, eliminating
the possibility of damage to the die.
Features
ï· High Current: 2.0 A
ï· The SOT--223 package can be soldered using wave or reflow
ï· Available in 12 mm Tape and Reel
Use PZT651T1 to order the 7 inch/1000 unit reel
Use PZT651T3 to order the 13 inch/4000 unit reel
ï· PNP Complement is PZT751T1
ï· These Devices are Pb--Free, Halogen Free/BFR Free and are RoHS
Compliant
http://onsemi.com
SOT--223 PACKAGE HIGH CURRENT
NPN SILICON TRANSISTOR
SURFACE MOUNT
COLLECTOR 2,4
BASE
1
EMITTER 3
MARKING
DIAGRAM
MAXIMUM RATINGS (TC = 25ï°C unless otherwise noted)
Rating
Symbol Value
Unit
Collector--Emitter Voltage
Collector--Base Voltage
Emitter--Base Voltage
Collector Current
Total Power Dissipation @ TA = 25ï°C
(Note 1)
Derate above 25ï°C
VCEO
VCBO
VEBO
IC
PD
60
Vdc
80
Vdc
5.0
Vdc
2.0
Adc
0.8
W
6.4
mW/ï°C
Storage Temperature Range
Junction Temperature
THERMAL CHARACTERISTICS
Tstg -- 65 to 150 ï°C
TJ
150
ï°C
Characteristic
Symbol
Max
Unit
Thermal Resistance from
Junction--to--Ambient in Free Air
RθJA
156
ï°C/W
Maximum Temperature for Soldering
TL
260
ï°C
Purposes
Time in Solder Bath
10
Sec
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Device mounted on a FR--4 glass epoxy printed circuit board using minimum
recommended footprint.
1
23
4 TO--261AA
CASE 318E--04
STYLE 1
1
AYW
651 G
G
A = Assembly Location
Y = Year
WW = Work Week
G = Pb--Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ï£ Semiconductor Components Industries, LLC, 2010
1
October, 2010 -- Rev. 7
Publication Order Number:
PZT651T1/D
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese