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NSS60101DMT_16 Datasheet, PDF (1/6 Pages) ON Semiconductor – NPN Transistors | |||
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NSS60101DMT
60 V, 1 A, Low VCE(sat) NPN
Transistors
ON Semiconductorâs e2PowerEdge family of low VCE(sat)
transistors are miniature surface mount devices featuring ultra low
saturation voltage (VCE(sat)) and high current gain capability. These
are designed for use in low voltage, high speed switching applications
where affordable efficient energy control is important.
Typical applications are DCâDC converters and LED lightning,
power managementâ¦etc. In the automotive industry they can be used
in air bag deployment and in the instrument cluster. The high current
gain allows e2PowerEdge devices to be driven directly from PMUâs
control outputs, and the Linear Gain (Beta) makes them ideal
components in analog amplifiers.
Features
⢠NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECâQ101
Qualified and PPAP Capable
⢠NSV60101DMTWTBG â Wettable Flanks Device
⢠These Devices are PbâFree, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (TA = 25°C)
Rating
Symbol Max Unit
CollectorâEmitter Voltage
VCEO
60 Vdc
CollectorâBase Voltage
VCBO
60 Vdc
EmitterâBase Voltage
VEBO
6
Vdc
Collector Current â Continuous
IC
1
A
Collector Current â Peak
ICM
2
A
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Characteristic
Symbol Max Unit
Thermal Resistance JunctionâtoâAmbient
(Notes 1 and 2)
RqJA
55 °C/W
Total Power Dissipation per Package @
TA = 25°C (Note 2)
Thermal Resistance JunctionâtoâAmbient
(Note 3)
PD
RqJA
2.27 W
69 °C/W
Power Dissipation per Transistor @ TA = 25°C
PD
1.8
W
(Note 3)
Junction and Storage Temperature Range
TJ, Tstg â55 to °C
+150
1. Per JESD51â7 with 100 mm2 pad area and 2 oz. Cu (Dual Operation).
2. PD per Transistor when both are turned on is one half of Total PD or 1.13 Watts.
3. Per JESD51â7 with 100 mm2 pad area and 2 oz. Cu (SingleâOperation).
www.onsemi.com
60 Volt, 1 Amp
NPN Low VCE(sat) Transistors
MARKING
DIAGRAM
1
6
WDFN6
2 AN MG 5
1
CASE 506AN
3G
4
AN = Specific Device Code
M = Date Code
G = PbâFree Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
6
1
7
5
2
8
4
3
6,7
1
5
2
4
3,8
ORDERING INFORMATION
Device
Package Shippingâ
NSS60101DMTTBG
NSV60101DMTWTBG
WDFN6
(PbâFree)
WDFN6
(PbâFree)
3000/Tape &
Reel
3000/Tape &
Reel
â For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
1
July, 2016 â Rev. 2
Publication Order Number:
NSS60101DMT/D
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