CAV24C256WE-GT3 Datasheet, PDF (1/11 Pages) ON Semiconductor – 256-Kb I2C CMOS Serial EEPROM

CAV24C256
256-Kb I²C CMOS Serial
EEPROM
Description
The CAV24C256 is a 256−Kb Serial CMOS EEPROM, internally
organized as 32,768 words of 8 bits each.
It features a 64−byte page write buffer and supports the Standard
(100 kHz), Fast (400 kHz) and Fast−Plus (1 MHz) I²C protocol.
Write operations can be inhibited by taking the WP pin High (this
protects the entire memory).
External address pins make it possible to address up to eight
CAV24C256 devices on the same bus.
On−Chip ECC (Error Correction Code) makes the device suitable
for high reliability applications.
Features
• Automotive Temperature Grade 1 (−40°C to +125°C)
• Supports Standard, Fast and Fast−Plus I²C Protocol
• 2.5 V to 5.5 V Supply Voltage Range
• 64−Byte Page Write Buffer
• Hardware Write Protection for Entire Memory
• Schmitt Triggers and Noise Suppression Filters on I²C Bus Inputs
(SCL and SDA)
• Low Power CMOS Technology
• 1,000,000 Program/Erase Cycles
• 100 Year Data Retention
• 8−lead SOIC and TSSOP Packages
• This Device is Pb−Free, Halogen Free/BFR Free, and RoHS
Compliant
V_CC
SCL
A₂, A₁, A₀
WP
CAV24C256
SDA
V_SS
Figure 1. Functional Symbol
http://onsemi.com
TSSOP−8
Y SUFFIX
CASE 948AL
SOIC−8
W SUFFIX
CASE 751BD
PIN CONFIGURATION
A₀
1
A₁
V_CC
WP
A₂
SCL
V_SS
SDA
SOIC (W), TSSOP (Y)
For the location of Pin 1, please consult the
corresponding package drawing.
Pin Name
A₀, A₁, A₂
SDA
SCL
WP
V_CC
V_SS
PIN FUNCTION
Function
Device Address
Serial Data
Serial Clock
Write Protect
Power Supply
Ground
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
1
November, 2012 − Rev. 0
Publication Order Number:
CAV24C256/D