English
Language : 

A42MX09-PLG84M Datasheet, PDF (48/143 Pages) Omron Electronics LLC – 40MX and 42MX FPGA Families
◁
40MX and 42MX FPGA Families
Table 1-29 • A40MX02 Timing Characteristics (Nominal 3.3 V Operation) (continued)
(Worst-Case Commercial Conditions, VCC = 3.0 V, TJ = 70°C)
Parameter / Description
–3 Speed –2 Speed –1 Speed Std Speed –F Speed
Units
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
Input Module Predicted Routing Delays1
tIRD1
FO = 1 Routing Delay
tIRD2
FO = 2 Routing Delay
tIRD3
FO = 3 Routing Delay
tIRD4
FO = 4 Routing Delay
tIRD8
FO = 8 Routing Delay
Global Clock Network
2.9
3.4
3.8
4.5
6.3 ns
3.6
4.2
4.8
5.6
7.8 ns
4.4
5.0
5.7
6.7
9.4 ns
5.1
5.9
6.7
7.8
11.0 ns
8.0
9.26
10.5
12.6
17.3 ns
tCKH
Input LOW to HIGH FO = 16
6.4
7.4
8.3
9.8
13.7 ns
FO = 128
6.4
7.4
8.3
9.8
13.7
tCKL
Input HIGH to LOW FO = 16
6.7
7.8
8.8
10.4
14.5 ns
FO = 128
6.7
7.8
8.8
10.4
14.5
tPWH
Minimum Pulse
Width HIGH
FO = 16 3.1
FO = 128 3.3
3.6
4.1
3.8
4.3
4.8
6.7
ns
5.1
7.1
tPWL
Minimum Pulse
Width LOW
FO = 16 3.1
FO = 128 3.3
3.6
4.1
3.8
4.3
4.8
6.7
ns
5.1
7.1
tCKSW
Maximum Skew
FO = 16
0.6
0.6
0.7
0.8
1.2 ns
FO = 128
0.8
0.9
1.0
1.2
1.6
tP
Minimum Period FO = 16 6.5
FO = 128 6.8
7.5
8.5
10.1
14.1
ns
7.8
8.9
10.4
14.6
fMAX
Maximum
FO = 16
113
105
96
Frequency
FO = 128
109
101
92
TTL Output Module Timing4
83
50 MHz
80
48
tDLH
Data-to-Pad HIGH
4.7
5.4
6.1
7.2
10.0 ns
tDHL
Data-to-Pad LOW
5.6
6.4
7.3
8.6
12.0 ns
tENZH
Enable Pad Z to HIGH
5.2
6.0
6.8
8.1
11.3 ns
tENZL
Enable Pad Z to LOW
6.6
7.6
8.6
10.1
14.1 ns
tENHZ
Enable Pad HIGH to Z
11.1
12.8
14.5
17.1
23.9 ns
tENLZ
Enable Pad LOW to Z
8.2
9.5
10.7
12.6
17.7 ns
dTLH
Delta LOW to HIGH
0.03
0.03
0.04
0.04
0.06 ns/pF
dTHL
Delta HIGH to LOW
0.04
0.04
0.05
0.06
0.08 ns/pF
Notes:
1. Routing delays are for typical designs across worst-case operating conditions. These parameters should be used for
estimating device performance. Post-route timing analysis or simulation is required to determine actual performance.
2. Set-up times assume fanout of 3. Further testing information can be obtained from the Timer utility.
3. The hold time for the DFME1A macro may be greater than 0 ns. Use the Timer tool from the Designer software to check
the hold time for this macro.
4. Delays based on 35 pF loading.
Revision 12
1- 44
 ▷