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A42MX09-PLG84M Datasheet, PDF (27/143 Pages) Omron Electronics LLC – 40MX and 42MX FPGA Families | |||
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40MX and 42MX FPGA Families
Output Drive Characteristics for 5.0 V PCI Signaling
MX PCI device I/O drivers were designed specifically for high-performance PCI systems. Figure 1-15 on page 1-25
shows the typical output drive characteristics of the MX devices. MX output drivers are compliant with the PCI Local
Bus Specification.
Table 1-17 ⢠DC Specification (5.0 V PCI Signaling)1
Symbol Parameter
VCCI Supply Voltage for I/Os
Condition
PCI
Min.
Max.
4.75
5.25
Min.
4.75
MX
Max.
5.252
Units
V
VIH
Input High Voltage
2.0 VCC + 0.5 2.0 VCCI + 0.3
V
VIL
Input Low Voltage
â0.5
0.8
â0.3
0.8
V
IIH
Input High Leakage Current
VIN = 2.7 V
70
â
10
µA
IIL
Input Low Leakage Current
VIN=0.5 V
â70
â
â10
µA
VOH Output High Voltage
IOUT = â2 mA
2.4
V
IOUT = â6 mA
3.84
VOL Output Low Voltage
IOUT = 3 mA, 6 mA
0.55
â
0.33
V
CIN
Input Pin Capacitance
10
â
10
pF
CCLK
LPIN
CLK Pin Capacitance
Pin Inductance
5
12
â
10
pF
20
â
< 8 nH3
nH
Notes:
1. PCI Local Bus Specification, Version 2.1, Section 4.2.1.1.
2. Maximum rating for VCCI â0.5 V to 7.0V.
3. Dependent upon the chosen package. PCI recommends QFP and BGA packaging to reduce pin inductance and
capacitance.
Table 1-18 ⢠AC Specifications (5.0V PCI Signaling)*
Symbol Parameter
Condition
PCI
Min.
ICL
Low Clamp Current
â5 < VIN ï£ â1 â25 + (VIN +1) /0.015
Slew (r) Output Rise Slew Rate 0.4 V to 2.4 V load
1
Slew (f) Output Fall Slew Rate 2.4 V to 0.4 V load
1
Note: *PCI Local Bus Specification, Version 2.1, Section 4.2.1.2.
Max.
5
5
MX
Min. Max.
â60 â10
1.8
2.8
2.8
4.3
Units
mA
V/ns
V/ns
1-23
Revision 12
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