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MSC5301B-01 Datasheet, PDF (9/15 Pages) OKI electronic componets – LCD COMMON/SEGMENT DRIVER WITH RAM
¡ Semiconductor
MSC5301B-01
• FRAM (Pin 38)
This is an input and output pin for the frame synchronizing signal to be used for master/slave
configuration. This is used as an output pin in master mode and as an input pin in slave mode.
• SI (Pin 34)
This is a serial data input of address data (8 bits) and segment data (64 bits). A pull-up resistor
(10 kW - 60 kW) and a Schmitt circuit are contained.
• SCK (Pin 35)
This is a shift clock input of address data (8 bits) and segment data (64 bits). The serial data is
shifted at the rising edge of SCK pulse. A pull-up resistor (10 kW - 60 kW) and a Schmitt circuit
are contained.
• LATCH (Pin 32)
This is a latch pulse input of address data (8 bits) and segment data (64 bits). The latch data
comes through at "H" level of LATCH and the data just before "H" level is latched at "L" level.
A pull-up resistor (10 kW - 60 kW) and a Schmitt circuit are contained.
• A/D (Pin 33)
This is a data select signal input of address data (8 bits) and segment data (64 bits). "H" level
is set in the case of address 8-bit input and "L" level is set in the case of segment data 64-bit input.
A pull-up resistor (10 kW - 60 kW) and a Schmitt circuit are contained.
• VDSP (Pin 44), V1 (Pin 29), V2 (Pin 45), V3 (Pin 46), V4 (Pin 28), VCC (Pin 42), GND (Pin 43)
These are power supply pins for this LSI and bias power supply pins for LCD driving.
VCC, which is a power supply pin, is from 4.5V to 5.5V and GND, which is a ground pin, is 0V.
VDSP, which is an LCD driving power supply pin, is usually used in the range between 6V and
16V. V1, V2, V3 and V4 are bias power supply pins for LCD driving and are usually used with
the bias voltage supplied from an external source.
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