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MSM56V16160D Datasheet, PDF (22/30 Pages) OKI electronic componets – 2-Bank x 524,288-Word x 16-Bit SYNCHRONOUS DYNAMIC RAM
,, ¡ Semiconductor
MSM56V16160D/DH
Read to Write Cycle (Same Bank) @ CAS Latency = 2, Burst Length = 4
CLK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
CKE
,,,, CS
RAS
CAS
ADDR
A11
A10
*Note1
tRCD
Ra
Ca0
Ca0
Ra
DQ
Da0 Da1 Da2 Da3
 tWR
WE
UDQM,
LDQM
Row Active Read Command
Write Command
Precharge Command
*Note: 1. In case CAS latency is 3, READ can be interrupted by WRITE.
The minimum command interval is [burst length + 1] cycles.
UDQM, LDQM must be high at least 3 clocks prior to the write command.
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