74ABT652A Datasheet, PDF (8/19 Pages) NXP Semiconductors – Octal transceiver/register, non-inverting 3-State

NXP Semiconductors
74ABT652A
Octal transceiver/register; non-inverting; 3-state
9. Static characteristics
Table 6. Static characteristics
Symbol Parameter
Conditions
25 °C
−40 °C to +85 °C Unit
Min Typ Max Min Max
V_IK
input clamping voltage V_CC = 4.5 V; I_IK = −18 mA
−1.2 −0.9 - −1.2
-V
V_OH
HIGH-level output
voltage
V_I = V_IL or V_IH
V_CC = 4.5 V; I_OH = −3 mA
V_CC = 5.0 V; I_OH = −3 mA
V_CC = 4.5 V; I_OH = −32 mA
2.5 3.0 -
2.5
3.0 3.5 -
3.0
2.0 2.4 -
2.0
-V
-V
-V
V_OL
V_OL(pu)
LOW-level output voltage V_CC = 4.5 V; I_OL = 64 mA;
V_I = V_IL or V_IH
power-up LOW-level
output voltage
V_CC = 5.5 V; I_O = 1 mA;
V_I = GND or V_CC
- 0.3 0.55 -
[1] _{- 0.13 0.55}
-
0.55 V
0.55 V
I_I
input leakage current
V_CC = 5.5 V; V_I = GND or 5.5 V
control pins
- ±0.01 ±1.0 -
±1.0 µA
data pins
-
±5 ±100 -
±100 µA
I_OFF
power-off leakage current V_CC = 0 V; V_I or V_O ≤ 4.5 V
- ±5.0 ±100 -
I_O(pu/pd) power-up/power-down V_CC = 2.1 V; V_O = 0.5 V;
[2] _{- ±5.0 ±50}
-
output current
V_I = GND or V_CC; OEAB, OEBA
don’t care
±100 µA
±50 µA
I_OZ
OFF-state output current V_CC = 5.5 V; V_I = V_IL or V_IH
V_O = 2.7 V
- 5.0 50
-
50 µA
V_O = 0.5 V
- −5.0 −50 -
−50 µA
I_LO
output leakage current V_CC = 5.5 V; HIGH-state;
V_O = 5.5 V; V_I = GND or V_CC
- 5.0 50
-
50 µA
I_O
output current
V_CC = 5.5 V; V_O = 2.5 V
[3][5] _{−180 −65 −40 −180}
−40 mA
I_CC
supply current
V_CC = 5.5 V; V_I = GND or V_CC
outputs HIGH-state
- 110 250 -
250 µA
outputs LOW-state
-
20 30
-
30 mA
outputs disabled
- 110 250 -
250 µA
∆I_CC
additional supply current per input pin; V_CC = 5.5 V; one
[4] _-
0.3 1.5
-
input at 3.4 V; other inputs at V_CC
or GND
1.5 mA
C_I
input capacitance
V_I = 0 V or V_CC
-
4
-
-
- pF
C_O
output capacitance
outputs disabled; V_O = 0 V
or V_CC
-
7
-
-
- pF
[1] For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
[2] This parameter is valid for any V_CC between 0 V and 2.1 V with a transition time of up to 10 ms. For V_CC = 2.1 V to V_CC = 5 V ± 10 %, a
transition time of up to 100 µs is permitted.
[3] Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
[4] This is the increase in supply current for each input at 3.4 V.
[5] This data sheet limit may vary among suppliers.
74ABT652A_2
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 12 March 2010
© NXP B.V. 2010. All rights reserved.
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