PSMN3R0-30YL_09 Datasheet, PDF (7/14 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET

NXP Semiconductors
PSMN3R0-30YL
N-channel TrenchMOS logic level FET
5000
C
(pF)
4000
003aac574
C_iss
3000
C_rss
2000
1000
0
0
2
4
6
8
10
V_GS (V)
4
R_DSon
(mΩ)
3
003aac569
2
3
5
7
9 _{VGS (V)} 11
Fig 9. Input and reverse transfer capacitances as a
Fig 10. Drain-source on-state resistance as a function
function of gate-source voltage; typical values
of gate-source voltage; typical values
10^-1
I_D
(A)
10^-2
003aab271
min
typ
max
10^-3
10^-4
10^-5
3
VGS (th)
(V)
2
1
max
typ
min
003aac337
10^-6
0
1
2 V_GS (V) 3
0
-6 0
0
60
120
180
Tj (°C)
Fig 11. Sub-threshold drain current as a function of
gate-source voltage
Fig 12. Gate-source threshold voltage as a function of
junction temperature
PSMN3R0-30YL_3
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 28 December 2009
© NXP B.V. 2009. All rights reserved.
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