PCF8563 Datasheet, PDF (7/32 Pages) NXP Semiconductors – Real-time clock/calendar

NXP Semiconductors
PCF8563
Real-time clock/calendar
Bits TIE and AIE: These bits activate or deactivate the generation of an interrupt when
TF or AF is asserted, respectively. The interrupt is the logical OR of these two conditions
when both AIE and TIE are set.
Table 5.
Bit
7 to 5
4
3
2
1
0
Control_status_2 - Control and Status register 2 (address 01h) bit description
Symbol Value Description
0
default value is logic 0
TI_TP 0
INT is active when TF is active (subject to the status of TIE)
1
INT pulses active according to Table 6 (subject to the status of
TIE); note that if AF and AIE are active then INT will be
permanently active
AF
0 (read) alarm flag inactive
1 (read) alarm flag active
0 (write) alarm flag is cleared
1 (write) alarm flag remains unchanged
TF
0 (read) timer flag inactive
1 (read) timer flag active
0 (write) timer flag is cleared
1 (write) timer flag remains unchanged
AIE
0
alarm interrupt disabled
1
alarm interrupt enabled
TIE
0
timer interrupt disabled
1
timer interrupt enabled
Table 6. INT operation (bit TI_TP = 1)
Source clock (Hz)
INT period (s)^[1]
n = 1^[2]
4 096
64
1
1_⁄60
1_{⁄8 192}
1_⁄128
1_⁄64
1_⁄64
[1] TF and INT become active simultaneously.
[2] n = loaded countdown value. Timer stopped when n = 0.
n > 1^[2]
1_{⁄4 096}
1_⁄64
1_⁄64
1_⁄64
7.6.3 Time and date registers
Table 7.
Bit
7
6 to 0
VL_seconds - Validity and Seconds register (address 02h) bit description
Symbol
Value Description
VL
0
clock integrity is guaranteed
1
integrity of the clock information is no longer guaranteed
SECONDS[6:0] 00 to 59 the current seconds, coded in BCD format. Example:
seconds register contains x101 1001 = 59 seconds
PCF8563_6
Product data sheet
Rev. 06 — 21 February 2008
© NXP B.V. 2008. All rights reserved.
7 of 32