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| 74HC2G02 Datasheet, PDF (7/13 Pages) NXP Semiconductors – Dual 2-input NOR gate | |||
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NXP Semiconductors
74HC2G02; 74HCT2G02
Dual 2-input NOR gate
VI 90 %
tW
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
RT
VCC
RL S1
CL
open
001aad983
Fig 7.
Test data is given in Table 10.
Deï¬nitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Load circuit for measuring switching times
Table 10. Test data
Type
Input
74HC2G02
74HCT2G02
VI
GND to VCC
GND to 3 V
tr, tf
⤠6 ns
⤠6 ns
Load
CL
15 pF, 50 pF
15 pF, 50 pF
RL
1 kâ¦
1 kâ¦
S1 position
tPHL, tPLH
open
open
74HC_HCT2G02_4
Product data sheet
Rev. 04 â 11 May 2009
© NXP B.V. 2009. All rights reserved.
7 of 13
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