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PSMN1R5-30YL Datasheet, PDF (6/15 Pages) NXP Semiconductors – N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
NXP Semiconductors
PSMN1R5-30YL
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
6. Characteristics
Table 6. Characteristics
Tested to JEDEC standards where applicable.
Symbol
Parameter
Conditions
Static characteristics
V(BR)DSS
drain-source
breakdown voltage
ID = 20 A; VGS = 0 V; Tj = 25 °C; tav =
100 ns
VGS(th)
gate-source threshold
voltage
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 12; see Figure 13
ID = 1 mA; VDS = VGS; Tj = 150 °C;
see Figure 13
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 13
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
VDS = 30 V; VGS = 0 V; Tj = 25 °C
VDS = 30 V; VGS = 0 V; Tj = 150 °C
VGS = 16 V; VDS = 0 V; Tj = 25 °C
VGS = -16 V; VDS = 0 V; Tj = 25 °C
VGS = 4.5 V; ID = 15 A; Tj = 25 °C
VGS = 10 V; ID = 15 A; Tj = 150 °C;
see Figure 14
VGS = 10 V; ID = 15 A; Tj = 100 °C;
see Figure 14
RG
gate resistance
Dynamic characteristics
VGS = 10 V; ID = 15 A; Tj = 25 °C
f = 1 MHz
QG(tot)
total gate charge
ID = 10 A; VDS = 12 V; VGS = 10 V;
see Figure 15; see Figure 16
ID = 0 A; VDS = 0 V; VGS = 10 V
ID = 10 A; VDS = 12 V; VGS = 4.5 V;
see Figure 15
QGS
QGS(th)
gate-source charge
pre-threshold
gate-source charge
ID = 10 A; VDS = 12 V; VGS = 4.5 V;
see Figure 15; see Figure 16
QGS(th-pl)
post-threshold
gate-source charge
QGD
VGS(pl)
gate-drain charge
gate-source plateau
voltage
VDS = 12 V; see Figure 15;
see Figure 16
Ciss
input capacitance
VDS = 12 V; VGS = 0 V; f = 1 MHz;
Coss
output capacitance
Tj = 25 °C; see Figure 17
Crss
reverse transfer
capacitance
Min Typ Max Unit
35 -
-
V
30 -
-
V
27 -
-
V
1.3 1.7 2.15 V
0.65 -
-
V
-
-
2.45 V
-
-
1
µA
-
-
100 µA
-
-
100 nA
-
-
100 nA
-
1.8 1.9 mΩ
-
-
2.8 mΩ
-
-
2.4 mΩ
-
1.3 1.5 mΩ
-
0.77 1.5 Ω
-
77.9 -
nC
-
70
-
nC
-
36.2 -
nC
-
11.6 -
nC
-
8
-
nC
-
3.6 -
nC
-
8.7 -
nC
-
2.34 -
V
-
5057 -
pF
-
1082 -
pF
-
398 -
pF
PSMN1R5-30YL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 9 April 2010
© NXP B.V. 2010. All rights reserved.
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