PCA9554B Datasheet, PDF (6/36 Pages) NXP Semiconductors – Low-voltage 8-bit I2C-bus and SMBus low power I/O port with interrupt, weak pull-up

NXP Semiconductors
PCA9554B; PCA9554C
Low-voltage 8-bit I²C-bus/SMBus low power I/O port
6.3 Interface definition
Table 5. Interface definition
Byte
Bit
7 (MSB) 6
5
4
3
2
1 0 (LSB)
PCA9554B
L
I²C-bus slave address
H
L
L
A2
A1
A0
R/W
PCA9554C
L
I²C-bus slave address
H
H
H
A2
A1
A0
R/W
I/O data bus
P7
P6
P5
P4
P3
P2
P1
P0
6.4 Register descriptions
6.4.1 Input port register (00h)
The Input port register (register 0) reflects the incoming logic levels of the pins, regardless
of whether the pin is defined as an input or an output by the Configuration register. The
Input port register is read only; writes to this register have no effect. The default value ‘X’
is determined by the externally applied logic level. An Input port register read operation is
performed as described in Section 7.2 “Read commands”.
Table 6. Input port register (address 00h)
Bit
7
6
5
4
3
2
1
0
Symbol
I7
I6
I5
I4
I3
I2
I1
I0
Default
X
X
X
X
X
X
X
X
6.4.2 Output port register (01h)
The Output port register (register 1) shows the outgoing logic levels of the pins defined as
outputs by the Configuration register. Bit values in these registers have no effect on pins
defined as inputs. In turn, reads from this register reflect the value that was written to this
register, not the actual pin value.
Table 7. Output port register (address 01h)
Bit
7
6
5
4
3
2
1
0
Symbol
O7
O6
O5
O4
O3
O2
O1
O0
Default
1
1
1
1
1
1
1
1
6.4.3 Polarity inversion register (02h)
The Polarity inversion register (register 2) allows polarity inversion of pins defined as
inputs by the Configuration register. If a bit in this register is set (written with ‘1’), the
corresponding port pin’s polarity is inverted. If a bit in this register is cleared (written with a
‘0’), the corresponding port pin’s original polarity is retained.
Table 8. Polarity inversion register (address 02h)
Bit
7
6
5
4
3
2
1
0
Symbol
N7
N6
N5
N4
N3
N2
N1
N0
Default
0
0
0
0
0
0
0
0
PCA9554B_PCA9554C
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 September 2012
© NXP B.V. 2012. All rights reserved.
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