74F827 Datasheet, PDF (6/13 Pages) NXP Semiconductors – 10-bit buffer/line driver, non-inverting 3-State

NXP Semiconductors
74F827
10-bit buffer/line driver; non-inverting; 3-state
Table 7. Dynamic characteristics …continued
GND = 0 V; for test circuit, see Figure 7.
Symbol Parameter
Conditions
t_PHL
HIGH to LOW
An to Yn; see Figure 5
propagation delay
C_L = 50 pF
C_L = 300 pF, 1 output switching
C_L = 300 pF, 10 outputs switching
t_PZH
OFF-state to HIGH OEn to Yn; see Figure 6
propagation delay
C_L = 50 pF
C_L = 300 pF, 1 output switching
C_L = 300 pF, 10 outputs switching
t_PZL
OFF-state to LOW OEn to Yn; see Figure 6
propagation delay
C_L = 50 pF
C_L = 300 pF, 1 output switching
C_L = 300 pF, 10 outputs switching
t_PHZ
HIGH to OFF-state OEn to Yn; see Figure 6
propagation delay
C_L = 50 pF
C_L = 300 pF, 1 output switching
C_L = 300 pF, 10 outputs switching
t_PLZ
LOW to OFF-state OEn to Yn; see Figure 6
propagation delay
C_L = 50 pF
C_L = 300 pF, 1 output switching
C_L = 300 pF, 10 outputs switching
11. Waveforms
25 °C; V_CC = 5.0 V 0 °C to 70 °C; Unit
V_CC = 5.0 V ± 0.5 V
Min Typ Max Min
Max
2.0 4.5 8.5 2.0
- 7.5 10.0
-
- 14.0 17.0
-
9.0 ns
11.0 ns
18.0 ns
5.0 8.0 12.0 4.5
- 15.0 20.0
-
- 15.0 20.0
-
14.0 ns
21.0 ns
21.0 ns
4.0 6.0 10.5 4.0
- 9.5 13.0
-
- 17.0 21.0
-
11.5 ns
14.0 ns
21.5 ns
2.5 5.0 8.0 2.0
- 15.0 19.0
-
- 15.0 19.0
-
8.5 ns
20.0 ns
20.0 ns
2.5 5.0 8.0 2.0
- 9.5 13.5
-
- 12.5 15.5
-
8.5 ns
14.0 ns
16.0 ns
V_I
An input
GND
V_OH
t_PLH
Yn output
V_OL
V_M
V_M
V_M
t_PHL
V_M
001aal244
Fig 5.
V_M = 1.5 V
V_OL and V_OH are typical voltage output levels that occur with the output load.
Propagation delay input (An) to output (Yn)
74F827_4
Product data sheet
Rev. 04 — 29 January 2010
© NXP B.V. 2010. All rights reserved.
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