LPC4370 Datasheet, PDF (52/150 Pages) NXP Semiconductors – 32-bit ARM Cortex-M4 + 2 x M0 MCU 282 kB SRAM Ethernet two HS USBs 80 Msps 12-bit ADC configurable peripherals

NXP Semiconductors
LPC4370
32-bit ARM Cortex-M4/M0 microcontroller
Table 3. Pin description …continued
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See Table 2.
Symbol
Description
Clock pins
CLK0
CLK1
CLK2
CLK3
Debug pins
DBGEN
N5 K3
T10 -
D14 K6
P12 -
[5] _O;
PU
[5] _O;
PU
[5] _O;
PU
[5] _O;
PU
O EMC_CLK0 — SDRAM clock 0.
O CLKOUT — Clock output pin.
- R — Function reserved.
- R — Function reserved.
I/O SD_CLK — SD/MMC card clock.
O EMC_CLK01 — SDRAM clock 0 and clock 1 combined.
I/O SSP1_SCK — Serial clock for SSP1.
I ENET_TX_CLK (ENET_REF_CLK) — Ethernet Transmit Clock (MII
interface) or Ethernet Reference Clock (RMII interface).
O EMC_CLK1 — SDRAM clock 1.
O CLKOUT — Clock output pin.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
O CGU_OUT0 — CGU spare clock output 0.
- R — Function reserved.
O I2S1_TX_MCLK — I2S1 transmit master clock.
O EMC_CLK3 — SDRAM clock 3.
O CLKOUT — Clock output pin.
- R — Function reserved.
- R — Function reserved.
I/O SD_CLK — SD/MMC card clock.
O EMC_CLK23 — SDRAM clock 2 and clock 3 combined.
O I2S0_TX_MCLK — I2S transmit master clock.
I/O I2S1_RX_SCK — Receive Clock. It is driven by the master and received by
the slave. Corresponds to the signal SCK in the I²S-bus specification.
O EMC_CLK2 — SDRAM clock 2.
O CLKOUT — Clock output pin.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
O CGU_OUT1 — CGU spare clock output 1.
- R — Function reserved.
I/O I2S1_RX_SCK — Receive Clock. It is driven by the master and received by
the slave. Corresponds to the signal SCK in the I²S-bus specification.
L4 A6 ^[3] I
I JTAG interface control signal. Also used for boundary scan.
LPC4370
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 21 October 2013
© NXP B.V. 2013. All rights reserved.
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