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P89LPC932A1 Datasheet, PDF (51/64 Pages) NXP Semiconductors – 8-Bit Microcontroller with accelerated two-clock 80C51 core 8kB 3V byte-erasable flash with 512-byte data EEPROM
NXP Semiconductors
P89LPC932A1
8-bit microcontroller with accelerated two-clock 80C51 core
Table 10. Dynamic characteristics (18 MHz) …continued
VDD = 3.0 V to 3.6 V unless otherwise specified.
Tamb = −40 °C to +85 °C for industrial applications, unless otherwise specified.[1][2]
Symbol Parameter
Conditions
Variable clock
Min
Max
tSPICLKH
SPICLK HIGH time
master
see Figure 24,
25, 26, 27
2⁄CCLK
-
slave
3⁄CCLK
-
tSPICLKL
SPICLK LOW time
master
see Figure 24,
25, 26, 27
2⁄CCLK
-
slave
3⁄CCLK
-
tSPIDSU SPI data set-up time (master or see Figure 24,
100
-
slave)
25, 26, 27
tSPIDH
SPI data hold time (master or
see Figure 24,
100
-
slave)
25, 26, 27
tSPIA
SPI access time (slave)
see Figure 26, 27
0
80
tSPIDIS
SPI disable time (slave)
see Figure 26, 27
0
160
tSPIDV
SPI enable to output data valid
time
see Figure 24,
25, 26, 27
2.0 MHz
-
160
3.0 MHz
-
111
tSPIOH
SPI output data hold time
see Figure 24,
0
-
25, 26, 27
tSPIR
SPI rise time
SPI outputs
(SPICLK, MOSI, MISO)
see Figure 24,
25, 26, 27
-
100
SPI inputs
(SPICLK, MOSI, MISO, SS)
-
2000
tSPIF
SPI fall time
SPI outputs
(SPICLK, MOSI, MISO)
see Figure 24,
25, 26, 27
-
100
SPI inputs
(SPICLK, MOSI, MISO, SS)
-
2000
[1] Parts are tested to 2 MHz, but are guaranteed to operate down to 0 Hz.
[2] Parameters are valid over operating temperature range unless otherwise specified.
fosc = 18 MHz Unit
Min Max
111
- ns
167
- ns
111
- ns
167
- ns
100
- ns
100
- ns
0
80 ns
-
160 ns
-
160 ns
-
111 ns
0
- ns
-
100 ns
- 2000 ns
-
100 ns
- 2000 ns
P89LPC932A1_3
Product data sheet
Rev. 03 — 12 March 2007
© NXP B.V. 2007. All rights reserved.
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