P89LPC932A1 Datasheet, PDF (4/64 Pages) NXP Semiconductors – 8-Bit Microcontroller with accelerated two-clock 80C51 core 8kB 3V byte-erasable flash with 512-byte data EEPROM

NXP Semiconductors
4. Block diagram
P89LPC932A1
8-bit microcontroller with accelerated two-clock 80C51 core
P3[1:0]
P2[7:0]
P1[7:0]
P0[7:0]
CRYSTAL
OR
RESONATOR
XTAL1
XTAL2
Fig 1. Block diagram
P89LPC932A1
ACCELERATED 2-CLOCK 80C51 CPU
8 kB
CODE FLASH
256-BYTE
DATA RAM
internal
bus
512-BYTE
AUXILIARY RAM
512-BYTE
DATA EEPROM
PORT 3
CONFIGURABLE I/Os
PORT 2
CONFIGURABLE I/Os
PORT 1
CONFIGURABLE I/Os
PORT 0
CONFIGURABLE I/Os
KEYPAD
INTERRUPT
WATCHDOG TIMER
AND OSCILLATOR
UART
I²C-BUS
SPI
REAL-TIME CLOCK/
SYSTEM TIMER
TIMER 0
TIMER 1
ANALOG
COMPARATORS
CCU (CAPTURE/
COMPARE UNIT)
POWER MONITOR
(POWER-ON RESET,
BROWNOUT RESET)
TXD
RXD
SCL
SDA
SPICLK
MISO
MOSI
SS
T0
T1
CMP2
CIN2A
CIN2B
CMP1
CIN1A
CIN1B
OCA
OCB
OCC
OCD
ICA
ICB
PROGRAMMABLE
OSCILLATOR DIVIDER
CPU
clock
CONFIGURABLE
OSCILLATOR
ON-CHIP
RC
OSCILLATOR
002aaa885
P89LPC932A1_3
Product data sheet
Rev. 03 — 12 March 2007
© NXP B.V. 2007. All rights reserved.
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