TDA8933 Datasheet, PDF (5/47 Pages) NXP Semiconductors – Class-D audio amplifier

NXP Semiconductors
7. Pinning information
7.1 Pinning
TDA8933
Class-D audio amplifier
V_SSD(HW) 1
IN1P 2
IN1N 3
DIAG 4
ENGAGE 5
POWER UP 6
CGND 7
V_DDA 8
V_SSA 9
OSCREF 10
HVPREF 11
INREF 12
TEST 13
IN2N 14
IN2P 15
V_SSD(HW) 16
Fig 2. Pin configuration diagram
TDA8933T
SO32
32 V_SSD(HW)
31 OSCIO
30 HVP1
29 V_DDP1
28 BOOT1
27 OUT1
26 V_SSP1
25 STAB1
24 STAB2
23 V_SSP2
22 OUT2
21 BOOT2
20 V_DDP2
19 HVP2
18 DREF
17 V_SSD(HW)
010aaa114
7.2 Pin description
Table 3. Pinning description
Symbol
Pin
Description
V_SSD(HW)
1
IN1P
2
negative digital supply voltage and handle wafer connection
positive audio input for channel 1
IN1N
3
negative audio input for channel 1
DIAG
4
diagnostic output; open-drain
ENGAGE
5
engage input to switch between Mute mode and Operating mode
POWERUP
6
power-up input to switch between Sleep mode and Mute mode
CGND
7
control ground; reference for POWERUP, ENGAGE and DIAG
V_DDA
8
V_SSA
9
OSCREF
10
positive analog supply voltage
negative analog supply voltage
input internal oscillator setting (only master setting)
HVPREF
11
decoupling of internal half supply voltage reference
INREF
12
decoupling for input reference voltage
TEST
13
test signal input; for testing purpose only
IN2N
14
negative audio input for channel 2
IN2P
15
positive audio input for channel 2
V_SSD(HW)
16
V_SSD(HW)
17
DREF
18
negative digital supply voltage and handle wafer connection
negative digital supply voltage and handle wafer connection
decoupling of internal (reference) 5 V regulator for logic supply
TDA8933_1
Preliminary data sheet
Rev. 01 — 15 May 2007
© NXP B.V. 2007. All rights reserved.
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