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PSMN8R7-80PS Datasheet, PDF (5/14 Pages) NXP Semiconductors – N-channel 80 V 8.7 mΩ standard level MOSFET in TO-220
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NXP Semiconductors
PSMN8R7-80PS
N-channel 80 V 8.7 mΩ standard level MOSFET in TO-220
6. Characteristics
Table 6. Characteristics
Symbol Parameter
Conditions
Static characteristics
V(BR)DSS
VGS(th)
drain-source
breakdown voltage
gate-source threshold
voltage
ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 10
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 10
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 11 and 10
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
VDS = 80 V; VGS = 0 V; Tj = 25 °C
VDS = 80 V; VGS = 0 V; Tj = 125 °C
VGS = -20 V; VDS = 0 V; Tj = 25 °C
VGS = 20 V; VDS = 0 V; Tj = 25 °C
VGS = 10 V; ID = 15 A; Tj = 175 °C;
see Figure 12
VGS = 10 V; ID = 15 A; Tj = 100 °C;
see Figure 12
VGS = 10 V; ID = 15 A; Tj = 25 °C;
see Figure 13
RG
internal gate resistance f = 1 MHz
(AC)
Dynamic characteristics
QG(tot)
QGS
QGS(th)
total gate charge
gate-source charge
pre-threshold
gate-source charge
ID = 0 A; VDS = 0 V; VGS = 10 V
ID = 25 A; VDS = 40 V; VGS = 10 V;
see Figure 14 and 15
ID = 25 A; VDS = 40 V; VGS = 10 V;
see Figure 14
QGS(th-pl) post-threshold
gate-source charge
QGD
gate-drain charge
ID = 25 A; VDS = 40 V; VGS = 10 V;
see Figure 14 and 15
VGS(pl)
gate-source plateau
voltage
ID = 25 A; VDS = 40 V; see Figure 15
Ciss
input capacitance
VDS = 40 V; VGS = 0 V; f = 1 MHz;
Coss
output capacitance
Tj = 25 °C; see Figure 16
Crss
reverse transfer
capacitance
td(on)
tr
td(off)
tf
turn-on delay time
rise time
turn-off delay time
fall time
VDS = 40 V; RL = 1.6 Ω; VGS = 10 V;
RG(ext) = 4.7 Ω
Min Typ Max Unit
73
80
1
-
2
-
-
-
-
-
-
[2]
-
-
-
-
V
-
-
V
-
-
V
-
4.6 V
3
4
V
0.08 5
µA
-
100 µA
2
100 nA
2
100 nA
18
21
Ω
-
14
mΩ
7.5 8.7 mΩ
1
-
Ω
-
44
-
nC
-
52
-
nC
-
15
-
nC
-
9.2 -
nC
-
5.8 -
nC
-
11.6 -
nC
-
4.6 -
V
-
3346 -
pF
-
296 -
pF
-
158 -
pF
-
21
-
ns
-
26
-
ns
-
46
-
ns
-
20
-
ns
PSMN8R7-80PS_1
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 29 January 2010
© NXP B.V. 2010. All rights reserved.
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