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PSMN3R5-30YL_09 Datasheet, PDF (5/14 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET
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NXP Semiconductors
PSMN3R5-30YL
N-channel TrenchMOS logic level FET
6. Characteristics
Table 6. Characteristics
Symbol Parameter
Static characteristics
V(BR)DSS drain-source
breakdown voltage
VGS(th)
gate-source threshold
voltage
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
RG
gate resistance
Dynamic characteristics
QG(tot)
total gate charge
QGS
QGS(th)
gate-source charge
pre-threshold
gate-source charge
QGS(th-pl) post-threshold
gate-source charge
QGD
VGS(pl)
gate-drain charge
gate-source plateau
voltage
Ciss
input capacitance
Coss
output capacitance
Crss
reverse transfer
capacitance
td(on)
turn-on delay time
tr
rise time
td(off)
turn-off delay time
tf
fall time
Source-drain diode
Conditions
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 20 A; VGS = 0 V; Tj = 25 °C; tav= 100 ns
ID = 1 mA; VDS= VGS; Tj = 25 °C; see Figure 11
and 12
ID = 1 mA; VDS= VGS; Tj = 150 °C; see Figure 12
ID = 1 mA; VDS= VGS; Tj = -55 °C; see Figure 12
VDS = 30 V; VGS = 0 V; Tj = 25 °C
VDS = 30 V; VGS = 0 V; Tj = 150 °C
VGS = 16 V; VDS = 0 V; Tj = 25 °C
VGS = -16 V; VDS = 0 V; Tj = 25 °C
VGS = 4.5 V; ID = 15 A; Tj = 25 °C
VGS = 10 V; ID = 15 A; Tj = 150 °C;
see Figure 13
VGS = 10 V; ID = 15 A; Tj = 25 °C
f = 1 MHz
ID = 10 A; VDS = 12 V; VGS = 4.5 V;
see Figure 14 and 15
ID = 0 A; VDS = 0 V; VGS = 10 V
ID = 10 A; VDS = 12 V; VGS = 10 V; see Figure 14
and 15
ID = 10 A; VDS = 12 V; VGS = 4.5 V;
see Figure 14 and 15
VDS = 12 V; see Figure 14 and 15
VDS = 12 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C;
see Figure 16
VDS = 12 V; RL = 0.5 Ω; VGS = 4.5 V;
RG(ext) = 4.7 Ω
Min
30
27
35
1.3
0.65
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ Max
-
-
-
-
-
-
1.7 2.15
-
-
-
2.45
-
1
-
100
-
100
-
100
3.37 4.61
-
6
2.43 3.5
0.53 1.5
19
-
37
-
41
-
6
-
4
-
2
-
5
-
2.4 -
2458 -
532 -
252 -
33
-
50
-
45
-
18
-
Unit
V
V
V
V
V
V
µA
µA
nA
nA
mΩ
mΩ
mΩ
Ω
nC
nC
nC
nC
nC
nC
nC
V
pF
pF
pF
ns
ns
ns
ns
PSMN3R5-30YL_3
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 31 December 2009
© NXP B.V. 2009. All rights reserved.
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