BUK108-50DL Datasheet, PDF (5/10 Pages) NXP Semiconductors – PowerMOS transistor Logic level TOPFET

Philips Semiconductors
PowerMOS transistor
Logic level TOPFET
Product specification
BUK108-50DL
120 ^PD%
Normalised Power Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Tmb / C
Fig.2. Normalised limiting power dissipation.
P_D% = 100⋅P_D/P_D(25 ˚C) = f(T_mb)
ID%
120
Normalised Current Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Tmb / C
Fig.3. Normalised continuous drain current.
I_D% = 100⋅I_D/I_D(25 ˚C) = f(T_mb); conditions: V_IS = 5 V
ID & IDM / A
100
RDS(ON) ^{= VDS/ID}
10
DC
1
BUK108-50DL
tp =
100 us
1 ms
10 ms
100 ms
Overload protection characteristics not shown
0.1
1
10
100
VDS / V
Fig.4. Safe operating area. T_mb = 25 ˚C
I_D & I_DM = f(V_DS); I_DM single pulse; parameter t_p
Zth / (K/W)
10
BUK108-50DL
D=
0.5
1
0.2
0.1
0.05
0.1 _0.02
P_D
tp
D=
tp
T
0
0.01
1E-07
1E-05
1E-03
t/s
T
t
1E-01
Fig.5. Transient thermal impedance.
Z_{th j-mb} = f(t); parameter D = t_p/T
1E+01
ID / A
30
20
10
VIS / V =
BUK108-50DL
6
5.5
5
4.5
4
3.5
3
0
0
Fig.6.
2
4
VDS / V
Typical on-state characteristics, T_j = 25 ˚C.
ID = f(V_DS); parameter V_IS; t_p = 2 ms
RDS(ON) / Ohm
0.20
VIS / V =
3.5
0.15
4
4.5
BUK108-50DL
5 5.5 ₆
0.10
0.05
0
0
10
20
30
ID / A
Fig.7. Typical on-state resistance, T_j = 25 ˚C.
R_DS(ON) = f(I_D); parameter V_IS; t_p = 2 ms
June 1996
5
Rev 1.000