74HC259 Datasheet, PDF (5/21 Pages) NXP Semiconductors – 8-bit addressable latch

NXP Semiconductors
74HC259; 74HCT259
8-bit addressable latch
Table 4.
LE
L
H
L
H
Operating mode select table^[1]
MR
Mode
H
Addressable latch mode
H
Memory mode
L
Demultiplexer mode
L
Reset mode
[1] H = HIGH voltage level; L = LOW voltage level.
7. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
Unit
V_CC
I_IK
I_OK
I_O
I_CC
I_GND
T_stg
P_tot
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
V_I < −0.5 V or V_I > V_CC + 0.5 V
V_O < −0.5 V or V_O > V_CC + 0.5 V
V_O = −0.5 V to V_CC + 0.5 V
T_amb = −40 °C to +125 °C
DIP16 package
−0.5
[1] _-
[1] _-
-
-
−70
−65
[2] _-
+7.0
V
±20
mA
±20
mA
±25
mA
+70
mA
-
mA
+150
°C
750
mW
SO16 package
[3] _-
500
mW
(T)SSOP16 package
[4] _-
500
mW
DHVQFN16 package
[5] _-
500
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] P_tot derates linearly with 12 mW/K above 70 °C.
[3] P_tot derates linearly with 8 mW/K above 70 °C.
[4] P_tot derates linearly with 5.5 mW/K above 60 °C.
[5] P_tot derates linearly with 4.5 mW/K above 60 °C.
74HC_HCT259_4
Product data sheet
Rev. 04 — 25 February 2009
© NXP B.V. 2009. All rights reserved.
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