PN7360AUHN Datasheet, PDF (44/86 Pages) NXP Semiconductors – NFC Cortex-M0 microcontroller

NXP Semiconductors
PN746X_736X
NFC Cortex-M0 microcontroller
Entering in suspend mode: An interrupt indicates to the application firmware when no
activity has been detected on the USB port for more that 3 ms. The application code
triggers the suspend mode.
Before entering in suspend mode, the PN7462 manages automatically, the deactivation of
the contact card.
Limitations: Suspend mode is prevented in the following cases:
• A host communication is in progress
• A wake-up condition is fulfilled. For example, external RF field presence is a wake-up
source, and PN7462 detects a field
• The RF field detector is a possible wake-up source, and the RF field detector is
disabled
• No voltage at pin PVDD
8.15.3.4 Wake-up from standby mode and suspend mode
PN7462 can be woken-up from standby mode, and suspend mode, using the following
means:
• Host Interface: SPI, HSUART, I²C, and USB if already selected before standby mode
(SPI, HSUART, and I²C) or suspend mode (USB).
• RF field detection (presence of a reader or an NFC device in reader mode or P2P
initiator)
• GPIO
• Contact card insertion, contact card removal
• Interrupt generated on the auxiliary UART interface, through the interrupt pin
• Wake-up counter, for example to timely check for the presence of any contact or
contactless card
• Current overconsumption on the PVDD_OUT, voltage above 5 V on TVDD_IN
• Temperature sensor: When the PN7462 goes in to standby mode because of
over-heating, and when the temperature goes below the sensor configured value,
PN7462 wakes-up automatically. Each temperature sensor can be configured
separately.
It is possible to configure the sources as enabled or disabled.
8.15.3.5 Hard Power-Down (HPD) mode
The PN7462 Hard Power-Down (HPD), reduces the chip power consumption, by
powering down most of the chip blocks. All clocks and LDOs are turned off, except the
main LDO which is set in low-power mode.
Entering in HPD mode: If the RST_N pin is set to low, the PN7462 enters in to Hard
Power Down (HPD) mode. It also enters in to HPD mode if the V_DDP(VBUS) goes below the
critical voltage necessary for the chip to work (2.3 V) and the auto HPD feature is enabled.
Exiting the HPD mode: The PN7462 leaves the HPD mode, when both RST_N pin is set
to high level and the V_DDP(VBUS) voltage is above 2.3 V.
PN746X_736X
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.1 — 5 April 2016
369231
© NXP Semiconductors N.V. 2016. All rights reserved.
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