PIMC31 Datasheet, PDF (4/13 Pages) NXP Semiconductors – 500 mA, 50 V NPN/PNP double resistor-equipped transistor; R1 = 1 kW, R2 = 10 kW

NXP Semiconductors
PIMC31
500 mA, 50 V NPN/PNP double RET; R1 = 1 kΩ, R2 = 10 kΩ
10³
Z_th(j-a)
(K/W)
10²
δ=1
0.50
0.20
0.10
0.75
0.33
0.05
10 ^0.02
0.01
006aaa494
0
1
10^−5
10^−4
10^−3
10^−2
10^−1
1
10
10²
10³
t_p (s)
FR4 PCB, standard footprint
Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
7. Characteristics
Table 7. Characteristics
T_amb = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Per transistor; for the PNP transistor with negative polarity
I_CBO
collector-base cut-off V_CB = 50 V; I_E = 0 A
current
I_CEO
collector-emitter
V_CE = 50 V; I_B = 0 A
cut-off current
I_EBO
emitter-base cut-off V_EB = 5 V; I_C = 0 A
current
h_FE
V_CEsat
DC current gain
collector-emitter
saturation voltage
V_CE = 5 V; I_C = 50 mA
I_C = 50 mA; I_B = 2.5 mA
V_I(off)
V_I(on)
R1
off-state input voltage
on-state input voltage
bias resistor 1 (input)
V_CE = 5 V; I_C = 100 µA
V_CE = 0.3 V; I_C = 20 mA
R2/R1
bias resistor ratio
C_c
collector capacitance V_CB = 10 V; I_E = i_e = 0 A;
f = 1 MHz
TR1 (NPN)
TR2 (PNP)
Min Typ Max Unit
-
-
100 nA
-
-
0.5 µA
-
-
0.72 mA
70 -
-
-
-
0.3 V
0.3 0.6 1
V
0.4 0.8 1.4 V
0.7 1
1.3 kΩ
9
10 11
-
7
-
pF
-
11 -
pF
PIMC31_1
Product data sheet
Rev. 01 — 24 March 2009
© NXP B.V. 2009. All rights reserved.
4 of 13