LPC2109_11 Datasheet, PDF (4/46 Pages) NXP Semiconductors – Single-chip 16/32-bit microcontrollers; 64/128/256 kB ISP/IAP flash with 10-bit ADC and CAN

NXP Semiconductors
4. Block diagram
LPC2109/2119/2129
Single-chip 16/32-bit microcontrollers
TMS⁽²⁾ TDI⁽²⁾ RTCK
TRST⁽²⁾ TCK⁽²⁾ TDO⁽²⁾
XTAL2
XTAL1 RESET
P0[30:27],
P0[25:0]
P1[31:16]
LPC2109
LPC2119
LPC2129
HIGH-SPEED
GPI/O⁽⁴⁾
46 PINS TOTAL
ARM7 LOCAL BUS
TEST/DEBUG
INTERFACE
ARM7TDMI-S
AHB BRIDGE
PLL
system
clock
SYSTEM
FUNCTIONS
VECTORED
INTERRUPT
CONTROLLER
AMBA Advanced High-performance
Bus (AHB)
V_DD(3V3)
V_DD(1V8)
V_SS
INTERNAL
SRAM
CONTROLLER
INTERNAL
FLASH
CONTROLLER
8/16 kB
SRAM
64/128/256 kB
FLASH
AHB TO APB APB
BRIDGE DIVIDER
AHB
DECODER
I²C-BUS SERIAL
INTERFACE
EINT[3:0]⁽¹⁾
4 × CAP0⁽¹⁾
4 × CAP1⁽¹⁾
4 × MAT0⁽¹⁾
4 × MAT1⁽¹⁾
AIN[3:0]⁽¹⁾
P0[30:27],
P0[25:0]
P1[31:16]
PWM[6:1]⁽¹⁾
EXTERNAL
INTERRUPTS
CAPTURE/
COMPARE
TIMER 0/TIMER 1
A/D CONVERTER
GENERAL
PURPOSE I/O
PWM0
SPI1/SSP⁽⁴⁾ SERIAL
INTERFACE
SPI0 SERIAL
INTERFACE
UART0/UART1
WATCHDOG
TIMER
SYSTEM
CONTROL
SCL⁽¹⁾
SDA⁽¹⁾
SCK1⁽¹⁾
MOSI1⁽¹⁾
MISO1⁽¹⁾
SSEL1⁽¹⁾
SCK0⁽¹⁾
MOSI0⁽¹⁾
MISO0⁽¹⁾
SSEL0⁽¹⁾
TXD[1:0]⁽¹⁾
RXD[1:0]⁽¹⁾
DSR1⁽¹⁾, CTS1⁽¹⁾,
RTS1⁽¹⁾, DTR1⁽¹⁾,
DCD1⁽¹⁾, RI1⁽¹⁾
RD[2:1]⁽¹⁾
TD[2:1]⁽¹⁾
CAN INTERFACE 1 AND 2
ACCEPTANCE FILTERS⁽³⁾
REAL-TIME CLOCK
002aad172
(1) Shared with GPIO.
(2) When test/debug interface is used, GPIO/other functions sharing these pins are not available.
(3) Only 1 for LPC2109.
(4) SSP interface and high-speed GPIO are available on LPC2109/01, LPC2119/01, and LPC2129/01 only.
Fig 1. Block diagram
LPC2109_2119_2129
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 14 June 2011
© NXP B.V. 2011. All rights reserved.
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