TDA19977A Datasheet, PDF(39/40 Page) NXP Semiconductors – Triple input HDMI 1.4a compliant receiver interface with equalizer

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TDA19977A Datasheet, PDF (39/40 Pages) NXP Semiconductors – Triple input HDMI 1.4a compliant receiver interface with equalizer

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NXP Semiconductors

TDA19977A; TDA19977B

Triple input HDMI receiver interface with digital processing

22. Tables

Table 1. Quick reference data . . . . . . . . . . . . . . . . . . . . .3

Table 2. Ordering information . . . . . . . . . . . . . . . . . . . . .4

Table 3. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .6

Table 4. Audio port configuration (Layout 0) . . . . . . . . .13

Table 5. Audio port configuration (Layout 1) . . . . . . . . .13

Table 6. Audio port configuration for HBR and DST

packets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

Table 7. I2C-bus slave address . . . . . . . . . . . . . . . . . . .17

Table 8. Limiting values . . . . . . . . . . . . . . . . . . . . . . . . .17

Table 9. Thermal characteristics . . . . . . . . . . . . . . . . . .18

Table 10. Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .18

Table 11. Output in 12-bit video port format (register

VP_CTRL address = 21h) . . . . . . . . . . . . . . . .21

Table 12. Output in 12-bit video port format (register

VP_CTRL address = 09h) . . . . . . . . . . . . . . . .22

Table 13. Output in 10-bit video port format (register

VP_CTRL address = 61h) . . . . . . . . . . . . . . . . 23

Table 14. Output in 10-bit video port format (register

VP_CTRL address = 58h) . . . . . . . . . . . . . . . . 24

Table 15. Output in 8-bit video port format (register

VP_CTRL address = A1h) . . . . . . . . . . . . . . . 25

Table 16. Output in 8-bit video port format (register

VP_CTRL address = 98h) . . . . . . . . . . . . . . . . 26

Table 17. Example of supported video formats . . . . . . . 27

Table 18. Examples of 3D video formats timing

supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Table 19. SnPb eutectic process (from J-STD-020C) . . . 33

Table 20. Lead-free process (from J-STD-020C) . . . . . . 33

Table 21. Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 22. Revision history . . . . . . . . . . . . . . . . . . . . . . . . 36

23. Figures

Fig 1.

Fig 2.

Fig 3.

Fig 4.

Fig 5.

Fig 6.

Fig 7.

Fig 8.

Fig 9.

Block diagram of TDA19977A; TDA19977B . . . . .5

Pin configuration for TDA19977A; TDA19977B. . .6

An example of an application with EDID

memory shared over all three HDMI inputs . . . . .16

An example of an application with EDID

memory shared over two HDMI inputs. . . . . . . . .17

Output timing diagram pin VCLK on pins

VP[29:0] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20

Output timing diagram pin ACLK on pins

AP[5:0] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20

Application diagram of

TDA19977A; TDA19977B . . . . . . . . . . . . . . . . . .30

Package outline SOT612-3 (HLQFP144) . . . . . .31

Temperature profiles for large and small

components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34

TDA19977A_TDA19977B

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 3 â 19 November 2010

39 of 40

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