SA58646 Datasheet, PDF (34/42 Pages) NXP Semiconductors – UHF 900 MHz transceiver IC

NXP Semiconductors
SA58646
UHF 900 MHz transceiver IC
Table 31. Other features …continued
V_CC = 3.3 V; T_amb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
∆V_CC/V_CC supply voltage variation to
supply voltage ratio
Output: pin CDLBD
battery voltage detection
accuracy after V_ref adjust;
L_BAT_DET[2:0] = 010
(V_CC = 3 V)
I_OL
LOW-level output current
V_OL
LOW-level output voltage
R_L = 470 kΩ
V_OH
HIGH-level output voltage
R_L = 470 kΩ
[1] V _hys = (V _high – V _low) × ^V--_V---^V-_t-_h-^B-
Min
Typ
Max Unit
-
0.5
5
%
20
-
-
-
0.9V_CC -
-
mA
0.1V_CC V
-
V
Table 32. Microcontroller serial interface
V_CC = 3.3 V; T_amb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Input and output: pins DATA, CLK and EN
V_IL
LOW-level input voltage
V_IH
HIGH-level input voltage
I_IL
LOW-level input current
I_IH
HIGH-level input current
C_i
input capacitance
Timing (see Figure 10)
V_IL = 0.3 V
V_IH = V_VREG − 0.3 V
t_su(CLK-EN)
t_su(DATA-CLK)
t_h(EN-CLK)
f_clk
t_r(i)
CLK to EN set-up time
DATA to CLK set-up time
EN to CLK hold time
clock frequency
input rise time
50 % of signals
50 % of signals
50 % of signals
at 10 % to 90 % on pins
DATA, CLK and EN;
t_f(i)
input fall time
at 10 % to 90 % on pins
DATA, CLK and EN;
t_h(CLK-EN)
t_w(EN)
t_startup(MCU)
CLK to EN hold time
pulse width on pin EN
MCU start-up time
at end of word
90 % of V_VREG to pins DATA,
CLK and EN
Min
Typ
-
-
V_VREG / 1.5 -
−5
-
-
-
-
-
50
-
50
-
50
-
-
-
-
-
-
-
100
-
[1] _{1 / fcomp}
-
-
-
Max Unit
0.5
V
V_CC
V
-
mA
5
mA
8
pF
-
ns
-
ns
-
ns
3
MHz
50
ns
50
ns
-
ns
-
ns
200
µs
[1] The minimum pulse width t_w(EN) should be equal to the period time of the comparison frequency. The synthesizer ensures that the
internal EN signal does not occur during a comparison phase to avoid any phase error jump. This time can be reduced to 100 ns for:
a) Clock divider programming
b) Synthesizer programming: only for words which do not influence the synthesizer (word 1, 2, 3)
SA58646_1
Product data sheet
Rev. 01 — 8 February 2007
© NXP B.V. 2007. All rights reserved.
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