SA58646 Datasheet, PDF (19/42 Pages) NXP Semiconductors – UHF 900 MHz transceiver IC

NXP Semiconductors
SA58646
UHF 900 MHz transceiver IC
8.2 Data register 1
Table 11. Data register 1 (address 001h) bit description
Legend: * reset value.
Bit
Symbol
Value Description
15 to 10 RX_PRE[5:0]
-
RX prescaler
9 to 0 RX_MDIV[9:0]
-
RX main divider
8.3 Data register 2
Table 12. Data register 2 (address 010h) bit description
Legend: * reset value.
Bit
Symbol
Value Description
15 to 10 reserved
00 undefined; must always be set logic 0
0000*
9 to 0 REF_DIV[9:0]
-
Reference divider
8.4 Data register 3
Table 13. Data register 3 (address 011h) bit description
Legend: * reset value.
Bit
Symbol
Value Description
15 to 10 TX_PRE[5:0]
-
TX prescaler
9 to 0 TX_MDIV[9:0]
-
TX main divider
8.5 Data register 4
Table 14. Data register 4 (address 100h) bit description
Legend: * reset value.
Bit
Symbol
Value Description
15
TM2
0* Test mode selection. Test mode bits are only used for test
in production and application tuning. Those bits have to be
set to logic 0 for normal operation. See Table 22.
14
CLKO
0* Clock output drive. Depending on the microcontroller
clock frequency and clock capacitive load, the output
CLKO can be programmed to optimize current
consumption. The clock output level is 1.5 V (p-p). Output
CLKO is AC-coupled with pin XTALI of the microcontroller.
The external resonator from the microcontroller is then
removed.
0* 10 MHz at 10 pF
1
10 MHz at 5 pF (or 5 MHz at 10 pF)
13
TM1
0* Test mode selection. Test mode bits are only used for test
in production and application tuning. Those bits have to be
set to logic 0 for normal operation. See Table 22.
SA58646_1
Product data sheet
Rev. 01 — 8 February 2007
© NXP B.V. 2007. All rights reserved.
19 of 42