74HC21 Datasheet, PDF (3/14 Pages) NXP Semiconductors – Dual 4-input AND gate

NXP Semiconductors
74HC21
Dual 4-input AND gate
5.2 Pin description
Table 2. Pin description
Symbol
1A, 1B, 1C, 1D
n.c.
1Y
GND
2Y
2A, 2B, 2C, 2D
V_CC
Pin
1, 2, 4, 5
3, 11
6
7
8
9, 10, 12, 13
14
6. Functional description
Description
data input
not connected
data output
ground (0 V)
data output
data input
supply voltage
Table 3. Function table^[1]
Input
nA
nB
nC
nD
L
X
X
X
X
L
X
X
X
X
L
X
X
X
X
L
H
H
H
H
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.
7. Limiting values
Output
nY
L
L
L
L
H
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
V_CC
I_IK
I_OK
I_O
I_CC
I_GND
T_stg
P_tot
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
DIP14 package
V_I < −0.5 V or V_I > V_CC + 0.5 V
V_O < −0.5 V or V_O > V_CC + 0.5 V
−0.5 V < V_O < V_CC + 0.5 V
−0.5
[1] _-
[1] _-
-
-
−50
−65
[2]
-
+7
V
±20
mA
±20
mA
±25
mA
50
mA
-
mA
+150 °C
750 mW
SO14 and (T)SSOP14
packages
-
500 mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP14 package: P_tot derates linearly with 12 mW/K above 70 °C.
For SO14 package: P_tot derates linearly with 8 mW/K above 70 °C.
For (T)SSOP14 packages: P_tot derates linearly with 5.5 mW/K above 60 °C.
74HC21_5
Product data sheet
Rev. 05 — 7 May 2009
© NXP B.V. 2009. All rights reserved.
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