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SC16C2552B Datasheet, PDF (22/38 Pages) NXP Semiconductors – 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
NXP Semiconductors
SC16C2552B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
7.11 SC16C2552B external reset condition
Table 21. Reset state for registers
Register
Reset state
IER
IER[7:0] = 0
ISR
ISR[7:1] = 0; ISR[0] = 1
LCR
LCR[7:0] = 0
MCR
MCR[7:0] = 0
LSR
LSR[7] = 0; LSR[6:5] = 1; LSR[4:0] = 0
MSR
MSR[7:4] = input signals; MSR[3:0] = 0
FCR
FCR[7:0] = 0
AFR
AFR[7:0] = 0
Table 22. Reset state for outputs
Output
Reset state
TXA, TXB
HIGH
OP2A, OP2B
HIGH
RTSA, RTSB
HIGH
DTRA, DTRB
HIGH
INTA, INTB
LOW
TXRDYA, TXRDYB LOW
8. Limiting values
Table 23. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
-
7
V
Vn
voltage on any other pin at D7 to D0 pins
GND − 0.3 VCC + 0.3 V
at input only pins
GND − 0.3 5.3
V
Tamb
Tstg
Ptot/pack
operating temperature
storage temperature
total power dissipation
per package
−40
+85
°C
−65
+150
°C
-
500
mW
SC16C2552B_3
Product data sheet
Rev. 03 — 12 February 2009
© NXP B.V. 2009. All rights reserved.
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