LPC2927_10 Datasheet, PDF (22/95 Pages) NXP Semiconductors – ARM9 microcontroller with CAN, LIN, and USB

NXP Semiconductors
LPC2927/2929
ARM9 microcontroller with CAN, LIN, and USB
Table 10 gives an overview of the flash-sector base addresses.
Table 10. Flash sector overview
Sector number
Sector size (kB)
11
8
12
8
13
8
14
8
15
8
16
8
17
8
18
8
0
64
1
64
2
64
3
64
4
64
5
64
6
64
7^[1]
64
8^[1]
64
9^[1]
64
10^[1]
64
Sector base address
0x2000 0000
0x2000 2000
0x2000 4000
0x2000 6000
0x2000 8000
0x2000 A000
0x2000 C000
0x2000 E000
0x2001 0000
0x2002 0000
0x2003 0000
0x2004 0000
0x2005 0000
0x2006 0000
0x2007 0000
0x2008 0000
0x2009 0000
0x200A 0000
0x200B 0000
[1] Availability of sector 7 to sector 10 depends on device type, see Section 3 “Ordering information”.
The index sector is a special sector in which the JTAG access protection and sector
security are located. The address space becomes visible by setting the FS_ISS bit and
overlaps the regular flash sector’s address space.
Note that the index sector, once programmed, cannot be erased. Any flash operation must
be executed out of SRAM (internal or external).
6.8.5 Flash bridge wait-states
To eliminate the delay associated with synchronizing flash-read data, a predefined
number of wait-states must be programmed. These depend on flash memory response
time and system clock period. The minimum wait-states value can be calculated with the
following formulas:
Synchronous reading:
WST > -^t-^a---^c--^c---⁽--^c--^l-^k---⁾ – 1
(1)
t_ttclk(sys)
Asynchronous reading:
WST > ^t--^a---^c--^c---⁽--^a--^d---^d--^r--⁾ – 1
(2)
t_tclk(sys)
LPC2927_29_4
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 04 — 14 April 2010
© NXP B.V. 2010. All rights reserved.
22 of 95