PTN3361B Datasheet, PDF (20/29 Pages) NXP Semiconductors – HDMI/DVI level shifter with dongle detect support and active DDC buffer

NXP Semiconductors
PTN3361B
HDMI/DVI level shifter with dongle detect and DDC buffer
11. Characteristics
11.1 Differential inputs
Table 10. Differential input characteristics for IN_Dx signals
Symbol Parameter
Conditions
UI
unit interval^[1]
V_{RX_DIFFp-p} differential input peak-to-peak voltage
T_{RX_EYE}
receiver eye time
minimum eye width at
IN_Dx input pair
V_i(cm)M(AC) peak common-mode input voltage (AC)
includes all frequencies
above 30 kHz
Z_{RX_DC}
V_RX(bias)
Z_I(se)
DC input impedance
bias receiver voltage
single-ended input impedance
inputs in
high-impedance state
Min Typ
[2] ₆₀₀
-
[3] _{0.175 -}
0.8
-
[4] _-
-
40
50
[5] _1.0
1.2
[6] ₁₀₀
-
Max Unit
4000 ps
1.200 V
-
UI
100 mV
60
Ω
1.4
V
-
kΩ
[1] UI (unit interval) = t_bit (bit time).
[2] UI is determined by the display mode. Nominal bit rate ranges from 250 Mbit/s to 1.65 Gbit/s per lane. Nominal UI at
1.65 Gbit/s = 606 ps.
[3] V_{RX_DIFFp-p} = 2 × |V_{RX_D+} − V_{RX_D−}|. Applies to IN_Dx signals.
[4] V_i(cm)M(AC) = |V_{RX_D+} + V_{RX_D−}| / 2 − V_RX(cm).
V_RX(cm) = DC (avg) of |V_{RX_D+} + V_{RX_D−}| / 2.
[5] Intended to limit power-up stress on chip set’s PCIe output buffers.
[6] Differential inputs will switch to a high-impedance state when OE_N is HIGH.
PTN3361B_2
Product data sheet
Rev. 02 — 7 October 2009
© NXP B.V. 2009. All rights reserved.
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