PTN3361B Datasheet, PDF (10/29 Pages) NXP Semiconductors – HDMI/DVI level shifter with dongle detect support and active DDC buffer

NXP Semiconductors
PTN3361B
HDMI/DVI level shifter with dongle detect and DDC buffer
7. Functional description
Refer to Figure 2 “Functional diagram of PTN3361B”.
The PTN3361B level shifts four lanes of low-swing AC-coupled differential input signals to
DVI and HDMI compliant open-drain current-steering differential output signals, up to
1.65 Gbit/s per lane. Speed of operation and cable length drive may be extended (by
using the programmable pre-emphasis feature) to up to 2.25 Gbit/s per lane. It has
integrated 50 Ω termination resistors for AC-coupled differential input signals. An enable
signal OE_N can be used to turn off the TMDS inputs and outputs, thereby minimizing
power consumption. The TMDS outputs are back-power safe to disallow current flow from
a powered sink while the PTN3361B is unpowered.
The PTN3361B's DDC channel provides active level shifting and buffering, allowing 3.3 V
source-side termination and 5 V sink-side termination. The sink-side DDC ports are
equipped with a rise time accelerator enabling drive of long cables or high bus
capacitance. This enables the system designer to isolate bus capacitance to meet HDMI
DDC version 1.3a distance specification. Furthermore, the DDC channel is augmented
with an I²C-bus slave ROM device that provides optional HDMI dongle detect response,
which can be enabled by dongle detect signal DDET. The PTN3361B offers back-power
safe sink-side I/Os to disallow backdrive current from the DDC clock and data lines when
power is off or when DDC is not enabled. An enable signal DCC_EN enables the DDC
level shifter block.
Remark: When used in an HDMI dongle, the DDET function must be enabled for correct
operation in accordance with DisplayPort interoperability guidelines. When used in a DVI
dongle, the DDET function must be disabled.
The PTN3361B also provides voltage translation for the Hot Plug Detect (HPD) signal
from 0 V to 5 V on the sink side to 0 V to 3.3 V on the source side.
The PTN3361B does not re-time any data. It contains no state machines except for the
DDC/I²C-bus block. No inputs or outputs of the device are latched or clocked. Because
the PTN3361B acts as a transparent level shifter, no reset is required.
7.1 Enable and disable features
PTN3361B offers different ways to enable or disable functionality, using the Output Enable
(OE_N) and DDC Enable (DDC_EN) inputs. Whenever the PTN3361B is disabled, the
device will be in Standby mode and power consumption will be minimal; otherwise the
PTN3361B will be in Active mode and power consumption will be nominal. These two
inputs each affect the operation of PTN3361B differently: OE_N affects only the TMDS
channels, and DDC_EN affects only the DDC channel. HPD_SINK does not affect either
of the channels. The following sections and truth table describe their detailed operation.
7.1.1 Hot plug detect
The HPD channel of PTN3361B functions as a level-shifting buffer to pass the HPD logic
signal from the display sink device (via input HPD_SINK) on to the display source device
(via output HPD_SOURCE).
The output logic state of HPD_SOURCE output always follows the logic state of input
HPD_SINK, regardless of whether the device is in Active or Standby mode.
PTN3361B_2
Product data sheet
Rev. 02 — 7 October 2009
© NXP B.V. 2009. All rights reserved.
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